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Getac Technology Corporation V110GD Manuale Utente

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© 2011 Microchip Technology Inc.
Preliminary
DS61168C-page 81
PIC32MX1XX/2XX
REGISTER 5-2:
NVMKEY: PROGRAMMING UNLOCK REGISTER
(1)
 
Bit 
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
W-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
NVMKEY<31:24>
23:16
W-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
NVMKEY<23:16>
15:8
W-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
NVMKEY<15:8>
7:0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
W-0
NVMKEY<7:0>
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0
NVMKEY<31:0>: 
Unlock Register bits
These bits are write-only, and read as ‘0’ on any read
Note 1:
This register is used as part of the unlock sequence to prevent inadvertent writes to the PFM.
REGISTER 5-3:
NVMADDR: FLASH ADDRESS REGISTER
 
Bit 
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<31:24>
23:16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<23:16>
15:8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<15:8>
7:0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
NVMADDR<7:0>
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0
NVMADDR<31:0>:
 Flash Address bits
Bulk/Chip/PFM Erase: Address is ignored.
Page Erase: Address identifies the page to erase.
Row Program: Address identifies the row to program.
Word Program: Address identifies the word to program.