Intel E7-2830 AT80615005787AB Manuale Utente
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AT80615005787AB
32
Intel
®
Xeon
®
Processor E7-8800/4800/2800 Product Families
September 2012
Specification Update
Specification Clarifications
The Specification Clarifications listed in this section may apply to the following
documents:
• Intel
®
Xeon
®
Processor E7-8800/4800/2800 Product Families Datasheet, Volumes
1 and 2
• Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 1: Basic
Architecture
• Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 2A:
Instruction Set Reference Manual A-M
• Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 2B:
Instruction Set Reference Manual N-Z
• Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:
System Programming Guide
• Intel
®
64 and IA-32 Architectures Software Developer’s Manual, Volume 3B:
System Programming Guide
SC1.
Package C3/C6 Memory Self-Refresh Error Handling
The following sub-bullet will be added to section 9.5.1.2 of the Intel® Xeon® Processor
E7-8800/4800/2800 Product Families Datasheet:
• Frequent transitions to package C3/C6 memory self-refresh during some idle
workloads may increase the number of recoverable (corrected) SMI link events
observed. While a low occurrence of recoverable events is normal for high speed
processor busses, the rate of recoverable events may increase during some idle
conditions due to the higher number of SMI link disable-enable transitions
occurring.
observed. While a low occurrence of recoverable events is normal for high speed
processor busses, the rate of recoverable events may increase during some idle
conditions due to the higher number of SMI link disable-enable transitions
occurring.