Goodram 8GB DDR2-800 GR800D264L5/8GDC Dépliant

0

Number of Serial PD Bytes written during module production

1

Total number of Bytes in Serial PD device

2

Fundamental Memory Type (FPM, EDO, SDRAM …)

3

Number of Row Addresses on this assembly

4

Number of Column Addresses on this assembly

5

Number of DIMM Banks

6

Data Width of this assembly

7

Data Width of this assembly

8

Voltage Interface Level of this assembly

9

SDRAM Cycle time at Maximum Supported CAS Latency (CL), CL=X

10

SDRAM Access from Clock

11

DIMM configuration type (Non-parity, Parity or ECC)

12

Refresh Rate/Type

13

Primary SDRAM Width

14

Error Checking SDRAM Width

15

SDRAM Device Attributes: Minimum Clock Delay, Back-to-Back RCA

16

SDRAM Device Attributes: Burst Lengths Supported

17

SDRAM Device Attributes: Number of Banks on SDRAM Device

18

SDRAM Device Attributes: CAS Latency

19

SDRAM Device Attributes: CS Latency

20

SDRAM Device Attributes: Write Latency/DIMM Type Information

21

SDRAM Module Attributes

22

SDRAM Device Attributes: General

23

Minimum Clock Cycle at CL = X - 0.5

24

Maximum Data Access Time (tAC) from Clock at CL = X - 0.5

25

Minimum Clock Cycle at CL = X - 1

26

Maximum Data Access Time (tAC) from Clock at CL = X - 1

27

Minimum Row Precharge Time (tRP)

28

Minimum Row Active to Row Active delay (tRRD)

29

Minimum RAS to CAS delay (tRCD)

30

Minimum Active to Precharge Time (tRAS)

31

Module Bank Density

32

Address and Command Input Setup Time Before Clock

33

Address and Command Input Hold Time After Clock

34

Data Input Setup Time Before Clock

35

Data Input Hold Time After Clock

36

Write recovery time (tWR)

37

Internal write to read command delay (tWTR)

38

Internal read to precharge command delay (tRTP)

39

Memory Analysis Probe Characteristics

40

Extension of Byte 41 tRC and Byte 42 tRFC

41

SDRAM Device Minimum Active to Active/Auto Refresh Time (tRC)

42

SDRAM Device Minimum Auto Refresh to Active/Auto Refresh (tRFC)

43

SDRAM Device Maximum device cycle time (tCKmax)

44

SDRAM Device Maximum skew between DQS and DQ signals (tDQSQ)

45

DDR SDRAM Device Maximum Read Data Hold Skew Factor (tQHS)

46

Reserved for future use

47

SDRAM Device Attributes - DDR SDRAM DIMM Height

48

Reserved for future use

49

Reserved for future use

50

Reserved for future use

51

Reserved for future use

52

Reserved for future use

53

Reserved for future use

54

Reserved for future use

55

Reserved for future use

56

Reserved for future use

57

Reserved for future use

58

Reserved for future use

59

Reserved for future use

60

Reserved for future use

61

Reserved for future use

62

SPD Revision

63

Checksum for Bytes 0-62

64-255

Manufacturer’s specific data

0x80
0x08
0x08
0x0F
0x0A
0x61
0x40
0x00
0x05
0x25
0x40
0x00
0x82
0x08
0x00
0x00
0x0C
0x08
0x70
0x01
0x02
0x00
0x07
0x25
0x40
0x3D
0x50
0x32
0x1E
0x32
0x2D
0x02
0x17
0x25
0x05
0x12
0x3C
0x1E
0x1E
0x00
0x30
0x39
0xC3
0x80
0x14
0x1E
0x0F
0x50
0x60
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0x44
0x43
0x31
0x49
0x2F
0x72
0x3A
0x43
0x00
0x00
0x00
0x00
0x11
0x66

128
8
8
15
10
97
64
0
5
37
64
0
130
8
0
0
12
8
112
1
2
0
7
37
64
61
80
50
30
50
45
2
23
37
5
18
60
30
30
0
48
57
195
128
20
30
15
80
96
95
68
67
49
73
47
114
58
67
0
0
0
0
17
102

GOODRAM logo and GOODDRIVE logo are registered trademarks of Wilk Elektronik S.A.
All other trademarks and logos are the property of their respective owners.
All products and specifications are subject to change without notice.
                                  
                                                                                                                                       Rev. 07.07.2009                

Wilk Elektronik S.A.
Poland, 43-174 Łaziska Górne, ul. Mikołowska 42
tel.: 0-32/ 736 90 00, fax: 0-32/ 736 90 01
www.wilk.com.pl  

l

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©  Wilk Elektronik S.A. 2009 

MEMORY MODULE SPECIFICATION