Intel G640T CM8062301002204 Manuale Utente
Codici prodotto
CM8062301002204
Datasheet, Volume 2
295
Processor Configuration Registers
§ §
58:57
RO-V
0h
Uncore
IOTLB Actual Invalidation Granularity (IAIG)
Hardware reports the granularity at which an invalidation request
Hardware reports the granularity at which an invalidation request
was processed through this field when reporting invalidation
completion (by clearing the IVT field).
The following are the encodings for this field.
00 = Reserved. This indicates hardware detected an incorrect
The following are the encodings for this field.
00 = Reserved. This indicates hardware detected an incorrect
invalidation request and ignored the request. Examples of
incorrect invalidation requests include detecting an
unsupported address mask value in Invalidate Address
register for page-selective invalidation requests.
01 = Global Invalidation performed. This could be in response to a
global, domain-selective, or page-selective invalidation
request.
10 = Domain-selective invalidation performed using the domain-id
specified by software in the DID field. This could be in
response to a domain-selective or a page-selective
invalidation request.
11 = Domain-page-selective invalidation performed using the
address, mask and hint specified by software in the Invalidate
Address register and domain-id specified in DID field. This can
be in response to a page-selective invalidation request.
56:50
RO
0h
Reserved
49
RW
0b
Uncore
Drain Reads (DR)
This field is ignored by hardware if the DRD field is reported as
This field is ignored by hardware if the DRD field is reported as
clear in the Capability register. When the DRD field is reported as
Set in the Capability register, the following encodings are
supported for this field:
0 = Hardware may complete the IOTLB invalidation without
0 = Hardware may complete the IOTLB invalidation without
draining any translated DMA read requests.
1 = Hardware must drain DMA read requests.
48
RW
0b
Uncore
Drain Writes (DW)
This field is ignored by hardware if the DWD field is reported as
This field is ignored by hardware if the DWD field is reported as
Clear in the Capability register. When the DWD field is reported as
Set in the Capability register, the following encodings are
supported for this field:
0 = Hardware may complete the IOTLB invalidation without
0 = Hardware may complete the IOTLB invalidation without
draining DMA write requests.
1 = Hardware must drain relevant translated DMA write requests.
47:40
RO
0h
Reserved
39:32
RW
00h
Uncore
Domain-ID (DID)
Indicates the ID of the domain whose IOTLB entries need to be
Indicates the ID of the domain whose IOTLB entries need to be
selectively invalidated. This field must be programmed by software
for domain-selective and page-selective invalidation requests.
The Capability register reports the domain-id width supported by
The Capability register reports the domain-id width supported by
hardware. Software must ensure that the value written to this field
is within this limit. Hardware ignores and not implements bits
47:(32+N), where N is the supported domain-id width reported in
the Capability register.
31:0
RO
0h
Reserved
B/D/F/Type:
0/0/0/VC0PREMAP
Address Offset:
108–10Fh
Reset Value:
0000_0000_0000_0000h
Access:
RW, RO-V, RW-V
Size:
64 bits
BIOS Optimal Default
0_0000_0000_0000h
Bit
Attr
Reset
Value
RST/
PWR
Description