Intel SC5299UP SC5299UPNA Manuale Utente
Codici prodotto
SC5299UPNA
Intel
®
Entry Server Chassis SC5299-E TPS
Power Sub-system
Revision 3.1
Intel order number D37594-005
39
Table 43. Ripple and Noise
+3.3V
+5V
+12V1/2
-12V
+5VSB
50mVp-p 50mVp-p 120mVp-p 120mVp-p 50mVp-p
2.2.4.20
Soft Starting
The power supply contains a control circuit that provides monotonic soft start for its outputs
without overstressing the AC line or any power supply components at any specified AC line or
load conditions. There is no requirement for rise time on the 5Vstby but the turn on/off is
monotonic.
without overstressing the AC line or any power supply components at any specified AC line or
load conditions. There is no requirement for rise time on the 5Vstby but the turn on/off is
monotonic.
2.2.4.21
Zero Load Stability Requirements
When the power subsystem operates in a no-load condition, it does not need to meet the output
regulation specification, but it must operate without any tripping of over-voltage or other fault
circuitry. When the power subsystem is subsequently loaded, it must begin to regulate and
source current without fault.
regulation specification, but it must operate without any tripping of over-voltage or other fault
circuitry. When the power subsystem is subsequently loaded, it must begin to regulate and
source current without fault.
2.2.4.22
Timing Requirements
The timing requirements for power supply operation are as follows. The output voltages must
rise from 10% to within regulation limits (T
rise from 10% to within regulation limits (T
vout_rise
) within 5 to 70ms, except for 5VSB - it is
allowed to rise from 1.0 to 25ms. The +3.3V, +5V and +12V output voltages should start to rise
approximately at the same time. All outputs must rise monotonically. The +5V output needs to
be greater than the +3.3V output during any point of the voltage rise. The +5V output must
never be greater than the +3.3V output by more than 2.25V. Each output voltage shall reach
regulation within 50ms (T
approximately at the same time. All outputs must rise monotonically. The +5V output needs to
be greater than the +3.3V output during any point of the voltage rise. The +5V output must
never be greater than the +3.3V output by more than 2.25V. Each output voltage shall reach
regulation within 50ms (T
vout_on
) of each other during turn on of the power supply. Each output
voltage shall fall out of regulation within 400msec (T
vout_off
) of each other during turn off. The
following figure shows the timing requirements for the power supply being turned on and off via
the AC input, with PSON held low and the PSON signal, with the AC input applied.
the AC input, with PSON held low and the PSON signal, with the AC input applied.
Table 44. Output Voltage Timing
Item
Description
Minimum
Maximum
Units
T
vout_rise
Output voltage rise time from each main output.
5.0*
70*
msec
T
vout_on
All main outputs must be within regulation of each
other within this time.
other within this time.
50
msec
T
vout_off
All main outputs must leave regulation within this
time.
time.
400
msec
* The 5VSB output voltage rise time shall be from 1.0 ms to 25.0 ms.