Intel G645T CM8062301263701 Manuale Utente
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CM8062301263701
Processor Configuration Registers
138
Datasheet, Volume 2
2.8.12
IOBAR—I/O Base Address Register
This register provides the Base offset of the I/O registers within Device 2. Bits 15:6 are
programmable allowing the I/O Base to be located anywhere in 16-bit I/O Address
Space. Bits 2:1 are fixed and return zero; bit 0 is hardwired to a one indicating that 8
bytes of I/O space are decoded. Access to the 8Bs of I/O space is allowed in PM state
D0 when I/O Enable (PCICMD bit 0) is set. Access is disallowed in PM states D1-D3 or if
I/O Enable is clear or if Device 2 is turned off.
programmable allowing the I/O Base to be located anywhere in 16-bit I/O Address
Space. Bits 2:1 are fixed and return zero; bit 0 is hardwired to a one indicating that 8
bytes of I/O space are decoded. Access to the 8Bs of I/O space is allowed in PM state
D0 when I/O Enable (PCICMD bit 0) is set. Access is disallowed in PM states D1-D3 or if
I/O Enable is clear or if Device 2 is turned off.
Note that access to this I/O BAR is independent of VGA functionality within Device 2.
If accesses to this I/O bar is allowed, then all 8, 16, or 32 bit I/O cycles from IA cores
that falls within the 8B are claimed.
that falls within the 8B are claimed.
2.8.13
SVID2—Subsystem Vendor Identification Register
This register is used to uniquely identify the subsystem where the PCI device resides.
B/D/F/Type:
0/2/0/PCI
Address Offset:
20–23h
Reset Value:
0000_0001h
Access:
RW, RO
Size:
32 bits
BIOS Optimal Default
00000h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:16
RO
0h
Reserved
15:6
RW
000h
FLR,
Uncore
I/O Base Address (IOBASE)
Set by the OS, these bits correspond to address signals [15:6].
Set by the OS, these bits correspond to address signals [15:6].
5:3
RO
0h
Reserved
2:1
RO
00b
Uncore
Memory Type (MEMTYPE)
Hardwired to 0s to indicate 32-bit address.
Hardwired to 0s to indicate 32-bit address.
0
RO
1b
Uncore
Memory/IO Space (MIOS)
Hardwired to 1 to indicate IO space.
Hardwired to 1 to indicate IO space.
B/D/F/Type:
0/2/0/PCI
Address Offset:
2C–2Dh
Reset Value:
0000h
Access:
RW-O
Size:
16 bits
Bit
Attr
Reset
Value
RST/
PWR
Description
15:0
RW-O
0000h
Uncore
Subsystem Vendor ID (SUBVID)
This value is used to identify the vendor of the subsystem. This
This value is used to identify the vendor of the subsystem. This
register should be programmed by BIOS during boot-up. Once
written, this register becomes Read Only. This register can only be
cleared by a Reset.