Intel G2100T CM8063701219000 Manuale Utente
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CM8063701219000
Processor Configuration Registers
256
Datasheet, Volume 2
2.19.1
MEM_TRML_ESTIMATION_CONFIG—Memory Thermal
Estimation Configuration Register
This register contains configuration regarding VTS temperature estimation calculations
that are done by PCODE. For the BW estimation mode, the following formula is used:
that are done by PCODE. For the BW estimation mode, the following formula is used:
VTS temperature estimation = T(n) + VTS_Offset
where T(n) = (1 – VTS_TIME_CONSTANT) * T(n–1) + VTS_MUTXTIPLIER *
(MEM_ACC(n) – MEM_ACC(n–1)), where (MEM_ACC(n) – MEM_ACC(n–1) equals
memory bandwidth
(MEM_ACC(n) – MEM_ACC(n–1)), where (MEM_ACC(n) – MEM_ACC(n–1) equals
memory bandwidth
This register is read by PCODE only during Reset Phase 4.
B/D/F/Type:
0/0/0/MCHBAR PCU
Address Offset:
5880–5883h
Reset Value:
438C_8324h
Access:
RW
Size:
32 bits
BIOS Optimal Default
0h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:22
RW
10Eh
Uncore
VTS multiplier (VTS_MUTXTIPLIER)
The VTS multiplier serves as a multiplier for the translation of the
The VTS multiplier serves as a multiplier for the translation of the
memory BW to temperature. The units are given in
1 / power(2,44).
21:12
RW
0C8h
Uncore
VTS time constant (VTS_TIME_CONSTANT)
This factor is relevant only for BW based temperature estimation.
This factor is relevant only for BW based temperature estimation.
It is equal to "1 minus alpha".
The value of the time constant (1 – alpha) is determined by
The value of the time constant (1 – alpha) is determined by
VTS_TIME_CONSTANT / power(2,25) per 1 mSec.
11
RO
0h
Reserved
10:4
RW
32h
Uncore
VTS offset adder (VTS_OFFSET)
The offset is intended to provide a temperature proxy offset, so the
The offset is intended to provide a temperature proxy offset, so the
option of having a fixed adder to VTS output is available.
3
RO
0h
Reserved
2
RW
1b
Uncore
Disable EXTTS (DISABLE_EXTTS)
When set, PCODE should ignore EXTTS indication that is obtained
When set, PCODE should ignore EXTTS indication that is obtained
from the PCH and will rely on PECI or DDR BW estimations.
1
RW
0b
Uncore
Disable Bandwidth Estimation (DISABLE_BW_ESTIMATION)
When set, PCODE should ignore DDR BW estimation that is
When set, PCODE should ignore DDR BW estimation that is
obtained from the memory controller and will rely on PECI or
EXTTS.
0
RW
0b
Uncore
Disable PECI Control (DISABLE_PECI_CONTROL)
When set, PCODE should ignore DDR temperature that is given by
When set, PCODE should ignore DDR temperature that is given by
PECI.