Silicon Power 1GB DDR2-533 SP001GBLRU533S02 Manuale Utente

Codici prodotto

SP001GBLRU533S02

SP001GBLRU533S02

240pin DDR2 533 Unbuffered DIMM

1. Description

The SP001GBLRU533S02 is a 128M x 8bits Double Data Rate SDRAM high-density

for DDR2-533.The SP001GBLRU533S02 consists of 8pcs CMOS 128Mx8 bits Double Data

Rate SDRAMs in 60 ball FBGA packages, and a 2048 bits serial EEPROM on a 240-pin

printed circuit board. The SP001GBLRU533S02 is a Dual In-Line Memory Module and is

intended for mounting into 240-pin edge connector sockets. Synchronous design allows

precise cycle control with the use of system clock. Data I/O transactions are possible on

both edges of DQS. Range of operation frequencies, programmable latencies allow the

same device to be useful for a variety of high bandwidth, high performance memory system

applications.

2. Features

˙Fast data transfer rates: PC2-4200
˙

˙240-pin, unbuffered dual in-line memory module
˙

˙VDD = VDDQ = +1.8V, VDDSPD = +1.7V to +3.6V
˙

˙JEDEC standard 1.8V I/O (SSTL_18-compatible)
˙

˙Differential data strobe (DQS, /DQS) option
˙

˙Four-bit prefetch architecture
˙

˙DLL to align DQ and DQS transitions with CK
˙

˙Multiple internal device banks for concurrent operation
˙

˙Posted /CAS additive latency (AL)
˙

˙WRITE latency = READ latency - 1 tCK
˙

˙Programmable burst lengths: 4 or 8
˙

˙Adjustable data-output drive strength
˙

˙64ms, 8,192-cycle refresh
˙

˙On-die termination (ODT)
˙

˙60ball FBGA Leaded & Pb-Free (RoHS compliant) package