Intel E7-8880 v2 CM8063601271810 Manuale Utente
Codici prodotto
CM8063601271810
Intel
®
Xeon
®
Processor E7-2800/4800/8800 v2 Product Family
417
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.7.28 VTD0_FLTREC[0:7]_SRC, VTD1_FLTREC0_SRC
Intel
®
VT-d Fault Record.
14.7.29 VTD[0:1]_INVADDRREG
Intel
®
VT-d Invalidate Address.
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
VTD0: 0x108, 0x118, 0x128, 0x138, 0x148, 0x158, 0x168, 0x178
VTD1: 0x1108
Bit
Attr
Default
Description
63:63
RW1CS
0x0
f:
Fault.
Hardware sets this field to indicate a fault is logged in this fault recording
Hardware sets this field to indicate a fault is logged in this fault recording
register. The F field is set by hardware after the details of the fault is
recorded in the PADDR, SID, FR and T fields.When this field is set, hardware
may collapse additional faults from the same requestor (SID).
Software writes the value read from this field to clear it.
Software writes the value read from this field to clear it.
62:62
ROS_V
0x0
type:
Type of the first faulted DMA request
0: DMA write
1: DMA read request
This field is only valid when Fault (F) bit is set.
0: DMA write
1: DMA read request
This field is only valid when Fault (F) bit is set.
61:60
ROS_V
0x0
address_type:
This field captures the AT field from the faulted DMA request. This field is
valid only when the F field is set.
59:40
RV
-
Reserved.
39:32
ROS_V
0x0
fault_reason:
Reason for the first translation fault. See Intel
®
VT-d spec for details.This
field is only valid when Fault bit is set.
31:16
RV
-
Reserved.
15:0
ROS_V
0x0
source_identifier:
Requester ID of the dma request that faulted. Valid only when F bit is set
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x200
, 0x1200
Bit
Attr
Default
Description
63:12
RW
0x0
addr:
Invalidation Address.
To request a page-specific invalidation request to hardware, software must
To request a page-specific invalidation request to hardware, software must
first write the corresponding guest physical address to this register, and then
issue a page-specific invalidate command through the IOTLB_REG.
11:7
RV
-
Reserved.