Finisar 40BASE-SR4 300m QSFP+ FTL410QD2C Manuale Utente
Codici prodotto
FTL410QD2C
FTL410QD2C Product Specification – July 2013
F i n i s a r
Finisar Corporation – 24-Jul-13 Rev B5 Finisar Confidential
Page 3
25
Rx4p
Receiver Non-Inverted Data Output
26
GND
Ground
1
27
ModPrsL
Module Present
28
IntL
Interrupt
29
Vcc Tx
+3.3 V Power supply transmitter
30
Vcc1
+3.3 V Power Supply
31
LPMode
Low Power Mode
32
GND
Ground
1
33
Tx3p
Transmitter Non-Inverted Data Input
34
Tx3n
Transmitter Inverted Data Input
35
GND
Ground
1
36
Tx1p
Transmitter Non-Inverted Data Input
37
Tx1n
Transmitter Inverted Data Input
38
GND
Ground
1
Notes
1. Circuit ground is internally isolated from chassis ground.
1. Circuit ground is internally isolated from chassis ground.
II.
General Product Characteristics
Parameter
Value
Unit
Notes
Module Form Factor
QSFP+
Number of Lanes
4 Tx and 4 Rx
Maximum Aggregate Data Rate
42.0
Gb/s
Maximum Data Rate per Lane
10.5
Gb/s
Higher bit rates may be supported.
Please contact Finisar.
Protocols Supported
Typical applications include
40G Ethernet, Infiniband,
Fibre Channel,
SATA/SAS3
Electrical Interface and Pin-out
38-pin edge connector
Pin-out as defined by the
QSFP+ MSA
Maximum Power Consumption
per End
per End
1.5
Watts
Varies with output voltage swing
and pre-emphasis settings
(see Figure 2)
Management Interface
Serial, I2C-based, 400 kHz
maximum frequency
As defined by the QSFP+ MSA
Data Rate Specifications
Symbol
Min
Typ
Max
Units
Ref.
Bit Rate per Lane
BR
1062
10500
Mb/sec
1
Bit Error Ratio
BER
10
-12
2
Link distance on OM3 MMF
d
300
meters
3
Link distance on OM4 MMF
d
400
meters
3
Notes:
1. Compliant with 40G and 10G* Ethernet. Compatible with 1 Gigabit Ethernet and 1/2/4/8/10G Fibre
Channel.
2. Tested with a PRBS 2
31
-1 test pattern.
3. Per 40GBASE-SR4 and 10GBASE-SR IEEE 802.3ba