Intel Phi 7120A SC7120A Scheda Tecnica
Codici prodotto
SC7120A
Document ID Number: 328209 003EN
Intel
®
Xeon Phi™ Coprocessor Datasheet
57
The coprocessor OS can request that the coprocessor enter package C6 state. Core
voltage is shut down. Coprocessor power is <10W
voltage is shut down. Coprocessor power is <10W
1
in this state.
The memory clock can be fully stopped, reducing memory power to its minimum state.
5.3
P-states and Turbo Mode
P-states, or Performance states, are different frequency settings requested by the host
OS or application when the cores are in the C0 active/executing state. Switching
between P-states is done by the coprocessor when the OS or application determines
that more or less performance is needed. All active cores run at the same P-state
frequency as there is only one clock source in the coprocessor.
OS or application when the cores are in the C0 active/executing state. Switching
between P-states is done by the coprocessor when the OS or application determines
that more or less performance is needed. All active cores run at the same P-state
frequency as there is only one clock source in the coprocessor.
Figure 5-6. Package-C6 and Memory M2 state
Package C6 - Sleep
(core power gating)
Full bandwidth enabled
VR
VR
Fan
~20%
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
M2
1. Value may be revised following silicon characterization
Figure 5-7. Package-C6 and Memory M3 state
Package C6 - Sleep
(core power gating)
Full bandwidth enabled
M3
M3
M3
M3
M3
M3
M3
M3
M3
M3
M3
M3
VR
VR
Fan
~20%