Acer E3-1220 v3 KC.12201.3E3 Manuale Utente

Package C6 state is the deepest C-state supported on discrete graphics systems with

PCI Express Graphics (PEG).

Package C7 state is the deepest C-state supported on integrated graphics systems (or

switchable graphics systems during integrated graphics mode). However, in most

configurations, package C6 will be more energy efficient than package C7 state. As a

result, package C7 state residency is expected to be very low or zero in most

scenarios where the display is enabled. Logic internal to the processor will determine

whether package C6 or package C7 state is the most efficient. There is no need to

make changes in BIOS or system software to prioritize package C6 state over package

C7 state.

The main memory is power managed during normal operation and in low-power ACPI

Cx states.

Any system memory (SM) interface signal that goes to a memory module connector in

which it is not connected to any actual memory devices is tri-stated. The benefits of

disabling unused SM signals are:
•

Reduced power consumption.

•

Reduced possible overshoot/undershoot signal quality issues seen by the

processor I/O buffer receivers caused by reflections from potentially un-

terminated transmission lines.

When a given rank is not populated, the corresponding chip select and CKE signals are

not driven.

At reset, all rows must be assumed to be populated, until it can be proven that they

are not populated.

CKE tristate should be enabled by BIOS where appropriate, since at reset all rows

must be assumed to be populated.

The processor implements extensive support for power management on the SDRAM

interface. There are four SDRAM operations associated with the Clock Enable (CKE)

signals, which the SDRAM controller supports. The processor drives four CKE pins to

perform these operations.

The CKE is one of the power-save means. When CKE is off, the internal DDR clock is

disabled and the DDR power is reduced. The power-saving differs according to the

selected mode and the DDR type used. For more information, refer to the IDD table in

the DDR specification.

The processor supports three different types of power-down modes in package C0.

The different power-down modes can be enabled through configuring

"PM_PDWN_config_0_0_0_MCHBAR". The type of CKE power-down can be configured

through PDWN_mode (bits 15:12) and the idle timer can be configured through

PDWN_idle_counter (bits 11:0). The different power-down modes supported are:
1. No power-down (CKE disable)

Intel

®

 Xeon

®

 Processor E3-1200 v3 Product Family

Datasheet – Volume 1 of 2

June 2013

58

Order No.: 328907-001