Hynix HMT351R7BFR8A-H9T8 Manuale Utente
Rev. 1.2 / Dec. 2011
52
Figure 1 - Measurement Setup and Test Load for IDD and IDDQ (optional) Measurements
[Note: DIMM level Output test load condition may be different from above
Figure 2 - Correlation from simulated Channel IO Power to actual Channel IO Power supported
by IDDQ Measurement
V
DD
DDR3L
SDRAM
V
DDQ
RESET
CK/CK
CK/CK
DQS, DQS
CS
RAS, CAS, WE
RAS, CAS, WE
A, BA
ODT
ZQ
ODT
ZQ
V
SS
V
SSQ
DQ, DM,
TDQS, TDQS
CKE
R
TT
=
25 Ohm
V
DDQ
/2
I
DD
I
DDQ
(optional)
Application specific
memory channel
environment
Channel
IO Power
Simulation
IDDQ
Simulation
IDDQ
Simulation
Channel IO Power
Number
IDDQ
Test Load
Correction