Intel Pentium 4 641 HH80552PG0882M Manuale Utente
Codici prodotto
HH80552PG0882M
28
Datasheet
Electrical Specifications
6.
The V
TT
referred to in these specifications refers to instantaneous V
TT
.
7.
All outputs are open drain.
8.
The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test
load.
load.
9.
Leakage to V
SS
with land held at V
TT
.
10.
Leakage to V
TT
with land held at 300 mV.
Table 2-12. GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1
V
IL
Input Low Voltage
0.0
GTLREF – (0.10 * V
TT
)
V
2, 3
V
IH
Input High Voltage
GTLREF + (0.10 * V
TT
)
V
TT
V
3, 4
V
OH
Output High Voltage
0.90*V
TT
V
TT
V
I
OL
Output Low Current
N/A
V
TT
/[(0.50*R
TT_MIN
) +
R
ON_MIN
]
A
-
I
LI
Input Leakage Current
N/A
± 200
µA
5
I
LO
Output Leakage Current
N/A
± 200
µA
-
R
ON
Buffer On Resistance
8
12
Ω
-
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3.
The V
TT
referred to in these specifications is the instantaneous V
TT
.
4.
V
IH
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5.
Leakage to V
SS
with land held at V
TT
.
Table 2-13. PWRGOOD and TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1, 2
V
HYS
Input Hysteresis
200
350
mV
3
V
T+
Input low to high
threshold voltage
threshold voltage
0.5 * (V
TT
+
V
HYS_MIN)
0.5 * (V
TT
+
V
HYS_MAX
)
V
4
V
T-
Input high to low
threshold voltage
threshold voltage
0.5 * (V
TT
–
V
HYS_MAX
)
0.5 * (V
TT
–
V
HYS_MIN
)
V
V
OH
Output High Voltage
N/A
V
TT
V
I
OL
Output Low Current
—
45
mA
5
I
LI
Input Leakage Current
—
± 200
µA
6
I
LO
Output Leakage Current
—
± 200
µA
-
R
ON
Buffer On Resistance
7
12
Ω
-
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
All outputs are open drain.
3.
V
HYS
represents the amount of hysteresis, nominally centered about 0.5 * V
TT
, for all TAP inputs.
4.
The V
TT
referred to in these specifications refers to instantaneous V
TT
.
5.
The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test
load.
load.
6.
Leakage to V
SS
with land held at V
TT
.
Table 2-14. VTTPWRGD DC Specifications
Symbol
Parameter
Min Typ
Max
Unit
Notes
V
IL
Input Low Voltage
—
—
0.3
V
V
IH
Input High Voltage
0.9
—
—
V