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WaveAce 2022
Operator's Manual
920836 Rev A
9
(Bit 7) plus 32 (bit 5). See the table with the ESR command description in Part Two for the
conditions corresponding to the bit set.
conditions corresponding to the bit set.
The Power ON bit appears only on the first *ESR? query after power-on (since the query clears
the register). You can determine this type of command error by reading the CMR bit with
CMR?. It is not necessary that you read/ clear this register in order to set the CMR bit in the
ESR on the next command error.
the register). You can determine this type of command error by reading the CMR bit with
CMR?. It is not necessary that you read/ clear this register in order to set the CMR bit in the
ESR on the next command error.
Standard Event Status Enable Register (ESE)
This register allows you to report one or more events in the ESR.
Modify ESE with *ESE and clear it with *ESE 0 (or by powering-on the oscilloscope). Read it with
*ESE?. For example, use
*ESE?. For example, use
*ESE 4
to set bit 2 (decimal 4) of the ESE Register to enable query
error reporting.
Internal State Change Status Register (INR)
INR reports the completion of a number of internal operations (the events tracked by this 16-
bit-wide register are listed with the INR? description in Part II).
bit-wide register are listed with the INR? description in Part II).
Read the register using INR?. The response is the binary weighted sum of the register bits. Clear
the register with INR? or ALST?, a *CLS command, or when power is applied to the oscilloscope.
the register with INR? or ALST?, a *CLS command, or when power is applied to the oscilloscope.
Command Error Status Register (CMR)
This register contains the code of the last command error detected by the oscilloscope. List
these error codes using CMR?.
these error codes using CMR?.
Read CMR with CMR?. The response is the error code. Clear the register with a CMR? or ALST?
query, a *CLS command, or when power is applied to the oscilloscope.
query, a *CLS command, or when power is applied to the oscilloscope.
Device Dependent Error Status Register (DDR)
DDR indicates the type of hardware errors affecting your instrument. Individual bits in this
register report specific hardware failures. List them using DDR?.
register report specific hardware failures. List them using DDR?.
Also, read this register using the DDR? query. The response is the binary weighted sum of the
error bits. Clear it with another DDR? or with ALST?, a *CLS command, or when power is
applied to the oscilloscope.
error bits. Clear it with another DDR? or with ALST?, a *CLS command, or when power is
applied to the oscilloscope.
Execution Error Status Register (EXR)
EXR contains the code of the last execution error detected by the oscilloscope. List these error
codes with EXR?.
codes with EXR?.
Read the register, again using the EXR? query. The response is the error code. Clear with
another EXR? or with ALST?, a *CLS command, or when power is applied to the oscilloscope.
another EXR? or with ALST?, a *CLS command, or when power is applied to the oscilloscope.