Microchip Technology IC MCU OTP 4K PIC16C74B-20/L PLCC-44 MCP PIC16C74B-20/L Scheda Tecnica
Codici prodotto
PIC16C74B-20/L
1998-2013 Microchip Technology Inc.
DS30605D-page 69
PIC16C63A/65B/73B/74B
Steps to follow when setting up an Asynchronous
Transmission:
Transmission:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 11.1)
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 11.1)
2.
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
bit SYNC and setting bit SPEN.
3.
If interrupts are desired, set interrupt enable bits
TXIE (PIE1<4>), PEIE (INTCON<6>), and GIE
(INTCON<7>), as required.
TXIE (PIE1<4>), PEIE (INTCON<6>), and GIE
(INTCON<7>), as required.
4.
If 9-bit transmission is desired, then set transmit
bit TX9.
bit TX9.
5.
Enable the transmission by setting bit TXEN,
which will also set flag bit TXIF.
which will also set flag bit TXIF.
6.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
should be loaded in bit TX9D.
7.
Load data to the TXREG register (starts trans-
mission).
mission).
FIGURE 11-2:
ASYNCHRONOUS MASTER TRANSMISSION
FIGURE 11-3:
ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
TABLE 11-3:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
RESETS
0Bh,8Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
PSPIF
(1)
ADIF
(2)
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF 0000 0000
0000 0000
18h
RCSTA
SPEN
RX9
SREN
CREN
—
FERR
OERR
RX9D
0000 -00x
0000 -00x
19h
TXREG
USART Transmit Register
0000 0000
0000 0000
8Ch
PIE1
PSPIE
(1)
ADIE
(2)
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE
TMR1IE 0000 0000
0000 0000
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010
0000 -010
99h
SPBRG
Baud Rate Generator Register
0000 0000
0000 0000
Legend: u = unchanged, x = unknown, - = unimplemented locations read as '0'.
Shaded cells are not used for asynchronous transmission.
Note
1: Bits PSPIE and PSPIF are reserved on the PIC16C63A/73B; always maintain these bits clear.
2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
2: Bits ADIE and ADIF are reserved on the PIC16C63A/65B; always maintain these bits clear.
Word 1
STOP Bit
Word 1
Transmit Shift Reg
Transmit Shift Reg
START Bit
Bit 0
Bit 1
Bit 7/8
Write to TXREG
Word 1
BRG output
(shift clock)
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty flag)
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
(Transmit shift
reg. empty flag)
Transmit Shift Reg.
Write to TXREG
BRG output
(shift clock)
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
(interrupt reg. flag)
TRMT bit
(Transmit shift
reg. empty flag)
(Transmit shift
reg. empty flag)
Word 1
Word 2
Word 1
Word 2
START Bit
STOP Bit
START Bit
Transmit Shift Reg.
Word 1
Word 2
Bit 0
Bit 1
Bit 7/8
Bit 0
Note: This timing diagram shows two consecutive transmissions.