Texas Instruments CDCLVP1204EVM - CDCLVP1204 Evaluation Module CDCLVP1204EVM CDCLVP1204EVM Scheda Tecnica
Codici prodotto
CDCLVP1204EVM
User's Guide
SCAU032 – July 2009
Low Additive Phase Noise Clock Buffer Evaluation Board
Figure 1. CDCLVP1204 Evaluation Board
Features:
•
Easy-to-use evaluation board to fan out low phase noise clocks
•
Easy device setup
•
Fast configuration
•
Control pins configurable through jumpers
•
Board powered at +2.5-/+3.3-V
•
Single-ended or differential input clocks
•
CDCLVP1204 supports four LVPECL outputs; CDCLVP1204EVM supports two LVPECL outputs
Contents
1
General Description
2
Signal Path and Control Circuitry
3
Getting Started
4
Input Clock Selection
5
Output Clock
6
Schematics and Layout
List of Figures
1
CDCLVP1204 Evaluation Board
2
CDCLVP1204EVM—Schematic
3
CDCLVP1204EVM—Schematic
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SCAU032 – July 2009
Low Additive Phase Noise Clock Buffer Evaluation Board
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