Texas Instruments Evaluation Board for the LM5017 LM5017EVAL/NOPB LM5017EVAL/NOPB Scheda Tecnica
Codici prodotto
LM5017EVAL/NOPB
+
+
+
V
IN
BST
RON
RTN
SW
VCC
FB
VIN
VOUT
R2
R7
R3
C9
C1
C4
R1
R5
L1
UVLO
C7
LM5017
12V-100V
1
2
3
4
5
6
8
7
(TP4)
+
C4
2.2 F
0.47 F 127
NŸ
14
NŸ
499
NŸ
GND
(TP1)
(TP2)
UVLO/SD
U1
R6
(TP3)
(TP5)
GND
R4
C6
C8
+
D2
C2
R8
EXP
0
Ÿ
1
NŸ
6.98
NŸ
22 F
0
Ÿ
220 H
0.01 F
1 F
3300 pF
0.1 F
46.4
NŸ
(TP6)
SW
R
5
V
IN
(UVLO,rising)
= 1.225V x
R
7
+1
¹
·
©
§
V
IN(HYS)
= I
HYS
R
5
T
ON
=
V
IN
10
-10
x R3
Theory of Operation
2
Theory of Operation
When the circuit is in regulation, the buck switch is turned on each cycle for a time determined by R3 and
V
V
IN
according to
:
(1)
The on-time of this evaluation board ranges from 5.56 µs at V
IN
= 12 V to 702 ns at V
IN
= 95 V. The on-
time varies inversely with input voltage. At the end of each on-time, the buck switch is off for at least 144
ns. In normal operation, the off-time is much longer. During the off-time, the load current is supplied by the
output capacitor (C9). When the output voltage falls sufficiently that the voltage at FB is below 1.225 V,
the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, a minimum
of 25 mV of ripple is required at FB to switch the regulation comparator. For a more detailed block
diagram and a complete description of the various functional blocks, see the LM5017 100V, 600mA
Constant On-Time Synchronous Buck Regulator Data Sheet (
ns. In normal operation, the off-time is much longer. During the off-time, the load current is supplied by the
output capacitor (C9). When the output voltage falls sufficiently that the voltage at FB is below 1.225 V,
the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, a minimum
of 25 mV of ripple is required at FB to switch the regulation comparator. For a more detailed block
diagram and a complete description of the various functional blocks, see the LM5017 100V, 600mA
Constant On-Time Synchronous Buck Regulator Data Sheet (
3
UVLO
The UVLO resistors (R5, R7) are selected using
:
(2)
and
(3)
On this evaluation board, R5 = 127 k
Ω
and R7 = 14.0 k
Ω
, resulting in UVLO rising threshold at V
IN
= 12 V
and a hysteresis of 2.5 V.
shows the evaluation board schematic.
Figure 2. Complete Evaluation Board Schematic for LM5017-Based Buck Converter
4
Board Connection and Start-up
The input connections are made to the TP1 (V
IN
) and TP2 (GND) terminals. The load is connected to the
TP3 (V
OUT
) AND TP5 (GND) terminals. Ensure the wires are adequately sized for the intended load
current. Before start-up, a voltmeter should be connected to the input and output terminals. The load
current should be monitored with an ammeter or a current probe. It is recommended that the input voltage
be increased gradually to 12 V, at which time the output voltage should be 10 V. If the output voltage is
correct, increase the input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED
100 V AT V
current should be monitored with an ammeter or a current probe. It is recommended that the input voltage
be increased gradually to 12 V, at which time the output voltage should be 10 V. If the output voltage is
correct, increase the input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED
100 V AT V
IN
.
2
AN-2200 LM5017 Evaluation Board
SNVA612B – January 2012 – Revised April 2013
Copyright © 2012–2013, Texas Instruments Incorporated