Texas Instruments XILINXPWR-082 Power Management Evaluation Module for Xilinx FPGAs XILINXPWR-082 XILINXPWR-082 Scheda Tecnica
Codici prodotto
XILINXPWR-082
XILINXPWR-082 EVM (HPA-082 board)
SWIFT
T M
(TPS54xxx series) DC/DC Converter-based Power Management Solution
Providing I
CCINT
=6A from V
IN
=5V
SUPPORTS:
-
-
Virtex-II Pro
T M
Design 2 (PR220) -
http://www-s.ti.com/sc/techlit/slva181.pdf
-
-
Spartan
T M
-3 Design 4 (PR216) -
http://www-s.ti.com/sc/techlit/slva177.pdf
o
Requires resistor R7 be changed to 28.7k
Ω
to generate V
CCINT
=1.2V
o
RocketIO linear regulators (U4-U7) are not needed
-
-
Virtex
T M
-II Design 2 (PR219) -
http://www-s.ti.com/sc/techlit/slva180.pdf
o
Requires linear regulator U2 be changed to TPS79433 to provide V
CCAUX
o
RocketIO linear regulators (U4-U7) are not needed
FEATURES:
-
-
High efficiency minimizes heat
-
-
Interchange SWIFT
T M
device to support 1.5 A to 9 A load currents
o
1.5A and 3A synchronous SWIFT devices are pin-pin compatible
o
6A, 8A, and 9A synchronous SWIFT devices are pin-pin compatible
-
-
Use of the TPS54x10 adjustable devices allow
o
use of smallest inductor and/or specific type of output capacitor
o
flexibility to re-compensate as needed, depending on the
bypass/decoupling capacitors used with the FPGA
-
-
In-rush current (for charging decoupling caps and FPGA start-up) that places a
demand on the input power supply is minimized by the use of optional
demand on the input power supply is minimized by the use of optional
o
Integrated soft-start configured with an capacitor to provide 10 ms rise
time for V
CCINT
and V
CCO
o
Sequencing of V
CCINT
, V
CCAUX
, then V
CCO
using
PWRGD and ENABLE
-
-
High UVLO trip point and integrated soft-start of the SWIFT
T M
devices
eliminates the need for an external Supply Voltage Supervisor (SVS) to monitor
the input rail.
the input rail.
-
-
RocketIO™ powered by ultra- low noise, high PSRR (for rejecting noise at the
input, preventing it from translating to the output) low dropout linear regulators
(LDOs), TPS79xxx and TPS786xx. This series has been qualified by Xilinx to
replace LT1963.
input, preventing it from translating to the output) low dropout linear regulators
(LDOs), TPS79xxx and TPS786xx. This series has been qualified by Xilinx to
replace LT1963.
-
-
Additional V
CCO
rails easily added and sequenced (if desired) using the TPS54xxx
PWRGD and ENABLE.
-
-
The design meets Xilinx’s V
CCINT
and V
CCO
start- up profile requirements, where
applicable, including monotonic voltage ramp, in-rush current and power voltage
ramp time requirements.
ramp time requirements.