Texas Instruments TPS65820 Evaluation Module TPS65820EVM TPS65820EVM Scheda Tecnica
Codici prodotto
TPS65820EVM
ELECTRICAL CHARACTERISTICS – SYSTEM SEQUENCING AND OPERATING MODES
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SLVS663B – MAY 2006 – REVISED APRIL 2008
Over recommended operating conditions (typical values at T
J
= 25
°
C), application circuit as in
(unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
QUIESCENT CURRENT
BAT pin current, sleep
I
BAT(SLEEP)
Input power not detected, V(BAT) = 4.2 V, Sleep mode set
370
µ
A
mode set
BAT pin current, charge
Charger function enabled by I
2
C, termination detected, input
I
BAT(DONE)
3
µ
A
terminated
power detected and selected
BAT pin current, charge
Charger function disabled by I
2
C, termination not detected,
I
BAT(CHGOFF)
3
µ
A
function OFF
input power detected and selected
Charger function disabled by I
2
C, termination not detected,
AC or USB pin current,
I
INP(CHGOFF)
input power detected and selected. All integrated supplies
200
µ
A
charge function OFF
and drivers OFF, no load at OUT pin.
UNDER-VOLTAGE LOCKOUT
Internal UVLO detection
NO POWER mode set at V(OUT) < V
UVLO
,
V
UVLO
–3%
2.5
3%
V
threshold
V(OUT) decreasing
UVLO detection
V
UVLO_HYS
V(OUT) increasing
120
mV
hysteresis
UVLO detection deglitch
t
DGL(UVLO)
Falling voltage only
5
ms
time
SYSTEM LOW VOLTAGE THRESHOLD
Minimum system voltage
System voltage V(SYS_IN) decreasing, SLEEP mode set if
V
LOW_SYS
0.97
1
1.03
V
detection threshold
V(SYS_IN) < V
LOW_SYS
Minimum system voltage
V
HYS(LOWSYS)
V(SYS_IN) increasing
50
mV
detection hysteresis
Minimum system voltage
V(SYS_IN) decreasing, valid only for initial power-up, see
t
DGL(HOTPLUG)
detection hotplug
650
ms
state machine diagram
deglitch time
Minimum system voltage
t
DGL(LOWSYS)
V(SYS_IN) decreasing, hotplug deglitch time expired
5
ms
detection deglitch time
THERMAL FAULT
T
SHUT
Thermal shutdown
Increasing junction temperature
165
°
C
Thermal shudown
T
HYS(SHUT)
Decreasing junction temperature
30
°
C
hysteresis
INTEGRATED SUPPLY POWER FAULT DETECTION
Power good fault
Falling output voltage, applies to all integrated supply outputs.
V
PGOOD
84%
90%
96%
detection threshold
Referenced to the programmed output voltage value
Power good fault
Rising output voltage, applies to all integrated supply outputs.
V
HYS(PGOOD)
3%
5%
7%
detection hysteresis
Referenced to V
PGOOD
threshold
HOT RESET FUNCTION
V
HRSTON
Low level input voltage
RESET mode set at V(HOT_RESET) < V
HRSTON
0.4
V
V
HRSTOFF
High level input voltage
HOT reset not active at V(HOT_RESET) > V
HRSTOFF
1.3
V
t
DGL(HOTRST)
Hot reset input deglitch
5000
µ
s
SYSTEM RESET – OPEN DRAIN OUTPUT RESPWRON
V
RSTLO
Low level output voltage
I
IL
= 10 mA, V(RESPWRON ) < V
RSTLO
0
0.3
V
I
TRSTPWON
Pullup current source
Internally connected to TRSTPWRON pin
0.9
1
1.2
µ
A
K
RESET
Reset timer constant
T
RESET
= K
RESET
°
C
TRSTPWON
1
ms/nF
SEQUENCING DELAYS
t
DLY(D1)
Sequencing delay
See sequencing timing diagram
0.24
ms
t
DLY(D1)
Sequencing delay
See sequencing timing diagram
12
ms
Copyright © 2006–2008, Texas Instruments Incorporated
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