Texas Instruments DRV2605EVM-CT Scheda Tecnica
SLOS825C – DECEMBER 2012 – REVISED SEPTEMBER 2014
Feature Description (continued)
7.3.2.4.1
Automatic Compensation for Resistive Losses
The DRV2605 device automatically compensates for resistive losses in the driver. During the automatic level-
calibration routine, the impedance of the actuator is checked and the compensation factor is determined and
stored in the A_CAL_COMP[7:0] bit.
calibration routine, the impedance of the actuator is checked and the compensation factor is determined and
stored in the A_CAL_COMP[7:0] bit.
7.3.2.4.2
Automatic Back-EMF Normalization
The DRV2605 device automatically compensates for differences in back-EMF magnitude between actuators. The
compensation factor is determined during the automatic level-calibration routine and the factor is stored in the
A_CAL_BEMF[7:0] bit.
compensation factor is determined during the automatic level-calibration routine and the factor is stored in the
A_CAL_BEMF[7:0] bit.
7.3.2.4.3
Calibration Time Adjustment
The duration of the automatic level-calibration routine has an impact on accuracy. The impact is highly
dependent on the start-time characteristic of the actuator. The auto-calibration routine expects the actuator to
have reached a steady acceleration before the calibration factors are calculated. Because the start-time
characteristic may be different for each actuator, the AUTO_CAL_TIME[1:0] bit can change the duration of the
automatic level-calibration routine to optimize calibration performance.
dependent on the start-time characteristic of the actuator. The auto-calibration routine expects the actuator to
have reached a steady acceleration before the calibration factors are calculated. Because the start-time
characteristic may be different for each actuator, the AUTO_CAL_TIME[1:0] bit can change the duration of the
automatic level-calibration routine to optimize calibration performance.
7.3.2.4.4
Loop-Gain Control
The DRV2605 device allows the user to control how fast the driver attempts to match the back-EMF (and thus
motor velocity) and the input signal level. Higher loop-gain (or faster settling) options result in less-stable
operation than lower loop gain (or slower settling). The LOOP_GAIN[1:0] bit controls the loop gain.
motor velocity) and the input signal level. Higher loop-gain (or faster settling) options result in less-stable
operation than lower loop gain (or slower settling). The LOOP_GAIN[1:0] bit controls the loop gain.
7.3.2.4.5
Back-EMF Gain Control
The BEMF_GAIN[1:0] bit sets the analog gain for the back-EMF amplifier. The auto-calibration routine
automatically populates this bit with the most appropriate value for the actuator.
automatically populates this bit with the most appropriate value for the actuator.
Modifying the SAMPLE_TIME[1:0] bit also adjusts the back-EMF gain. The higher the sample, time the higher
the gain.
the gain.
By default, the back-EMF is sampled once during a period. In the event that a twice per-period sampling is
desired, assert the LRA_DRIVE_MODE bit.
desired, assert the LRA_DRIVE_MODE bit.
7.3.2.5 Actuator Diagnostics
The DRV2605 device is capable of determining whether the actuator is not present (open) or shorted. If a fault is
detected during the diagnostic process, the DIAG_RESULT bit is asserted.
detected during the diagnostic process, the DIAG_RESULT bit is asserted.
7.3.3 Open-Loop Operation for LRA
When using the PWM input in open-loop mode, the DRV2605 device employs a fixed divider that observes the
PWM signal and commutates the output drive signal at the PWM frequency divided by 128. To accomplish LRA
drive, the host should drive the PWM frequency at 128 times the desired operating frequency.
PWM signal and commutates the output drive signal at the PWM frequency divided by 128. To accomplish LRA
drive, the host should drive the PWM frequency at 128 times the desired operating frequency.
7.3.4 Open-Loop Operation for ERM
The DRV2605 device offers ERM open-loop operation through the PWM input. The output voltage is based on
the duty cycle of the provided PWM signal, where the OD_CLAMP[7:0] bit in register 0x17 sets the full-scale
amplitude. For details see the
the duty cycle of the provided PWM signal, where the OD_CLAMP[7:0] bit in register 0x17 sets the full-scale
amplitude. For details see the
section.
7.3.5 Flexible Front-End Interface
The DRV2605 device offers multiple ways to launch and control haptic effects. The MODE[2:0] bit in register
0x01 is used to select the interface mode.
0x01 is used to select the interface mode.
7.3.5.1 PWM Interface
When the DRV2605 device is in PWM interface mode, it accepts PWM data at the IN/TRIG pin. The DRV2605
device drives the actuator continuously in this mode until the user sets the device to standby mode or to enter
another interface mode. In this mode, the strength of vibration is determined by the duty cycle.
device drives the actuator continuously in this mode until the user sets the device to standby mode or to enter
another interface mode. In this mode, the strength of vibration is determined by the duty cycle.
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