Texas Instruments THS7368EVM Evaluation Module THS7368EVM THS7368EVM Scheda Tecnica
Codici prodotto
THS7368EVM
75 W
S-Video Y' 1 Out
CVBS 1 Out
CVBS
R
SOC/DAC/Encoder
S-Video Y’
R
S-Video C’
R
Y'/G'
R
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SD1 OUT
SD2 OUT
SD3 OUT
Disable SD
GND
Disable HD
SF1 OUT
SF2 OUT
SF3 OUT
Bypass SF
SD1 IN
SD2 IN
SD3 IN
NC
V
S+
NC
SF1 IN
SF2 IN
SF3 IN
Bypass SD
THS7368
Bypass
SD LPF
SD LPF
Bypass
SF LPF
P' /B'
B
R
P' /R'
R
R
75 W
75 W
S-Video C' 1 Out
75 W
75 W
75 W
Y'/G' 1 Out
75 W
P’ /B' 1 Out
B
75 W
75 W
P' /R' 1 Out
R
75 W
75 W
75 W
75 W
S-Video Y' 1 Out
CVBS 1 Out
75 W
75 W
S-Video C' 1 Out
75 W
75 W
75 W
Y'/G' 1 Out
75 W
P' /B' 1 Out
B
75 W
75 W
P’ /R' 1 Out
R
75 W
75 W
75 W
+2.7 V to
+5 V
Disable SF
Disable SD
SBOS497 – DECEMBER 2009
www.ti.com
(1) SF indicates selectable filter.
Figure 41. Typical Six-Channel System with DC-Coupled Line Driving and Two Outputs Per Channel
One concern of dc-coupling, however, arises if the
but power and thermal analysis should always be
line is terminated to ground. If the ac-bias input
examined in any system to ensure that no issues
configuration is used, the output of the THS7368 has
arise. Be sure to utilize RMS power and not
a dc bias on the output, such as 1.6 V. With two lines
instantaneous power when evaluating the thermal
terminated to ground, this configuration allows a dc
performance.
current path to flow, such as 1.6 V/75-
Ω
= 21.3 mA.
Note that the THS7368 can drive the line with
The result of this configuration is a slightly decreased
dc-coupling
regardless
of
the
input
mode
of
high output voltage swing and an increase in power
operation. The only requirement is to make sure the
dissipation of the THS7368. While the THS7368 was
video line has proper termination in series with the
designed to operate with a junction temperature of up
output (typically 75
Ω
). This requirement helps isolate
to +125°C, care must be taken to ensure that the
capacitive loading effects from the THS7368 output.
junction temperature does not exceed this level or
Failure to isolate capacitive loads may result in
else long-term reliability could suffer. Using a 5-V
instabilities with the output buffer, potentially causing
supply, this configuration can result in an additional
ringing
or
oscillations
to
appear.
The
stray
dc power dissipation of (5 V – 1.6 V) × 21.3 mA =
capacitance appearing directly at the THS7368 output
72.5 mW per channel. With a 3.3-V supply, this
pins should be kept below 20 pF for the fixed SD filter
dissipation reduces to 36.2 mW per channel. The
channels and below 15 pF for the selectable filter
overall low quiescent current of the THS7368 design
minimizes potential thermal issues even when using
the TSSOP package at high ambient temperatures,
minimizes potential thermal issues even when using
the TSSOP package at high ambient temperatures,
26
Copyright © 2009, Texas Instruments Incorporated
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