Texas Instruments TLV70130 Low-Dropout Regulator Evaluation Module TLV70130EVM-077 TLV70130EVM-077 Scheda Tecnica
Codici prodotto
TLV70130EVM-077
Introduction
1
Introduction
The Texas Instruments TLV70130EVM-077 EVM helps design engineers to evaluate the operation and
performance of the TLV701xx family of linear regulators for possible use in their own circuit applications.
This particular EVM configuration contains a single linear regulator with internal current limit. The
TLV701xx series of LDO regulators exhibit ultralow quiescent current that is virtually constant over the
complete range of load and thermal specifications. The TLV701xx series is available in a 3-mm x 3-mm
SOT23-5 package. The regulator, including external components, is capable of delivering up to 150 mA to
the load depending on the input/output power dissipation across the part. The TLV701xx is stable with any
capacitor
performance of the TLV701xx family of linear regulators for possible use in their own circuit applications.
This particular EVM configuration contains a single linear regulator with internal current limit. The
TLV701xx series of LDO regulators exhibit ultralow quiescent current that is virtually constant over the
complete range of load and thermal specifications. The TLV701xx series is available in a 3-mm x 3-mm
SOT23-5 package. The regulator, including external components, is capable of delivering up to 150 mA to
the load depending on the input/output power dissipation across the part. The TLV701xx is stable with any
capacitor
>
0.47
µ
F; however, for conservative design practice accounting for widely varying noise
environments, and dynamic line/load conditions, a 1-
µ
F input and output capacitor have been used in the
design.
2
Setup
This section describes the jumpers and connectors on the EVM as well as how to properly connect, set
up, and use the TLV70130EVM.
up, and use the TLV70130EVM.
2.1
Input/Output Connectors and Jumper Descriptions
2.1.1
J1
–
VIN
J1 is the input power supply voltage connector. Twist the positive input lead and ground return lead from
the input power supply, and keep them as short as possible to minimize EMI transmission. Add additional
bulk capacitance between J1 and J3 if the supply leads are greater than 6 inches. For example, an
additional 47-
the input power supply, and keep them as short as possible to minimize EMI transmission. Add additional
bulk capacitance between J1 and J3 if the supply leads are greater than 6 inches. For example, an
additional 47-
µ
F electrolytic capacitor connected from J1 to ground can improve the transient response of
the TLV70130, while eliminating unwanted ringing on the input due to long-wire connections.
2.1.2
J2
–
VOUT
J2 is the regulated output voltage connector.
2.1.3
J3
–
GND
J3 is the ground-return connector for the input power supply.
2.1.4
J4
–
GND
J4 is the output ground-return connector
2.2
Equipment Setup
•
Turn off the input power supply after verifying that its output voltage is set to greater than 3.2 V (24 V
maximum). Connect the positive voltage lead from the input power supply to VIN, at the J1 connector
of the EVM. Connect the ground lead from the input power supply to GND at the J3 connector of the
EVM.
maximum). Connect the positive voltage lead from the input power supply to VIN, at the J1 connector
of the EVM. Connect the ground lead from the input power supply to GND at the J3 connector of the
EVM.
•
Connect desired load (
≤
150 mA) between an OUT pin at connector J2 and a GND pin at connector
J4.
3
Operation
•
Turn on the input power supply. For initial operation, set the input power supply, VIN
–
J1, to 5 V.
•
Vary the respective loads and VIN voltages as necessary for test purposes.
4
Test Results
This section provides typical performance waveforms for the TLV70130EVM-077 printed-circuit board
(PCB).
(PCB).
2
TLV70130EVM-077
SLVU554
–
October 2011
Copyright
©
2011, Texas Instruments Incorporated