Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Scheda Tecnica
Codici prodotto
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Comparator A Down Interrupt
Description
Value
No interrupt has occurred or the interrupt is masked.
0
The
INTCMPAD
bits in the PWMnRIS and PWMnINTEN registers
are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCMPAD
bit in the PWMnRIS register.
0
RW1C
INTCMPAD
3
Comparator A Up Interrupt
Description
Value
No interrupt has occurred or the interrupt is masked.
0
The
INTCMPAU
bits in the PWMnRIS and PWMnINTEN registers
are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCMPAU
bit in the PWMnRIS register.
0
RW1C
INTCMPAU
2
Counter=Load Interrupt
Description
Value
No interrupt has occurred or the interrupt is masked.
0
The
INTCNTLOAD
bits in the PWMnRIS and PWMnINTEN
registers are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCNTLOAD
bit in the PWMnRIS register.
0
RW1C
INTCNTLOAD
1
Counter=0 Interrupt
Description
Value
No interrupt has occurred or the interrupt is masked.
0
The
INTCNTZERO
bits in the PWMnRIS and PWMnINTEN
registers are set, providing an interrupt to the interrupt controller.
1
This bit is cleared by writing a 1. Clearing this bit also clears the
INTCNTZERO
bit in the PWMnRIS register.
0
RW1C
INTCNTZERO
0
1981
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller