Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Scheda Tecnica
Codici prodotto
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00
RO
reserved
31:29
Instruction Access Disable
Description
Value
Instruction fetches are enabled.
0
Instruction fetches are disabled.
1
0
RW
XN
28
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
RO
reserved
27
Access Privilege
For information on using this bit field, see Table 3-5 on page 151.
0
RW
AP
26:24
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
RO
reserved
23:22
Type Extension Mask
For information on using this bit field, see Table 3-3 on page 150.
0x0
RW
TEX
21:19
Shareable
For information on using this bit, see Table 3-3 on page 150.
0
RW
S
18
Cacheable
For information on using this bit, see Table 3-3 on page 150.
0
RW
C
17
Bufferable
For information on using this bit, see Table 3-3 on page 150.
0
RW
B
16
Subregion Disable Bits
Description
Value
The corresponding subregion is enabled.
0
The corresponding subregion is disabled.
1
Region sizes of 128 bytes and less do not support subregions. When
writing the attributes for such a region, configure the
writing the attributes for such a region, configure the
SRD
field as 0x00.
See the section called “Subregions” on page 150 for more information.
0x00
RW
SRD
15:8
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
RO
reserved
7:6
Region Size Mask
The
SIZE
field defines the size of the MPU memory region specified by
the MPUNUMBER register. Refer to Table 3-10 on page 209 for more
information.
information.
0x0
RW
SIZE
5:1
December 13, 2013
210
Texas Instruments-Advance Information
Cortex-M4 Peripherals