Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Scheda Tecnica
Codici prodotto
DK-TM4C129X
Register 11: DMA Channel Useburst Clear (DMAUSEBURSTCLR), offset 0x01C
Each bit of the DMAUSEBURSTCLR register represents the corresponding μDMA channel. Setting
a bit clears the corresponding
a bit clears the corresponding
SET[n]
bit in the DMAUSEBURSTSET register.
DMA Channel Useburst Clear (DMAUSEBURSTCLR)
Base 0x400F.F000
Offset 0x01C
Type WO, reset -
Offset 0x01C
Type WO, reset -
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
CLR[n]
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Type
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CLR[n]
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Type
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Reset
Description
Reset
Type
Name
Bit/Field
Channel [n] Useburst Clear
Description
Value
No effect.
0
Setting a bit clears the corresponding
SET[n]
bit in the
DMAUSEBURSTSET register meaning that µDMA channel [n]
responds to single and burst requests.
responds to single and burst requests.
1
-
WO
CLR[n]
31:0
747
December 13, 2013
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Tiva
™
TM4C129XNCZAD Microcontroller