Texas Instruments DRV8835 Evaluation Module DRV8835EVM DRV8835EVM Scheda Tecnica

This document is provided with the DRV8835 and DRV8836 customer evaluation module (EVM) as a
supplement to the DRV8835 (

) and DRV8836 (

) datasheets. It details the hardware

implementation of the EVM.

1

PCB Layout (Top Composite View)

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2

Connections

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2.1

Control (J2 Header)

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2.2

Motor Output (J1 Header)

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2.3

Power Connections

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3

Jumpers and Controls

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3.1

JP1 – VCC (DRV8835) or nSLEEP (DRV8836)

...............................................................

3.2

JP2 – MODE Select

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3.3

JP3, JP4, JP5, and JP7 – Source Select Jumpers

............................................................

3.4

JP6 – Regulator Input

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3.5

S1, S2, S3, and S4 – Input Control

..............................................................................

3.6

Test Points

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4

Schematic and Bill of Materials

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4.1

Schematic

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4.2

Bill of Materials

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1

SLVU694 – March 2012

Copyright © 2012, Texas Instruments Incorporated