Texas Instruments DS100KR800EVK evaluation board DS100KR800EVK/NOPB DS100KR800EVK/NOPB Scheda Tecnica
Codici prodotto
DS100KR800EVK/NOPB
SNLS340D – NOVEMBER 2011 – REVISED APRIL 2013
Table 6. Example of EEPROM for 4 Devices using 2 Address Maps
(continued)
EEPROM Address
Address (Hex)
EEPROM Data
Comments
45
2D
0x00
46
2E
0x54
47
2F
0x54
End Device 0, 1 - Address Offset 39
48
30
0x00
Begin Device 2, 3 - Address Offset 3
49
31
0x00
50
32
0x04
51
33
0x07
52
34
0x00
53
35
0x00
EQ CHB0 = 00
54
36
0xAB
VOD CHB0 = 1.0V
55
37
0x00
DEM CHB0 = 0 (0dB)
56
38
0x00
EQ CHB1 = 00
57
39
0x0A
VOD CHB1 = 1.0V
58
3A
0xB0
DEM CHB1 = 0 (0dB)
59
3B
0x00
60
3C
0x00
EQ CHB2 = 00
61
3D
0xAB
VOD CHB2 = 1.0V
62
3E
0x00
DEM CHB2 = 0 (0dB)
63
3F
0x00
EQ CHB3 = 00
64
40
0x0A
VOD CHB3 = 1.0V
65
41
0xB0
DEM CHB3 = 0 (0dB)
66
42
0x01
67
43
0x80
68
44
0x01
EQ CHA0 = 00
69
45
0x56
VOD CHA0 = 1.0V
70
46
0x00
DEM CHA0 = 0 (0dB)
71
47
0x00
EQ CHA1 = 00
72
48
0x15
VOD CHA1 = 1.0V
73
49
0x60
DEM CHA1 = 0 (0dB)
74
4A
0x00
75
4B
0x01
EQ CHA2 = 00
76
4C
0x56
VOD CHA2 = 1.0V
77
4D
0x00
DEM CHA2 = 0 (0dB)
78
4E
0x00
EQ CHA3 = 00
79
4F
0x15
VOD CHA3 = 1.0V
80
50
0x60
DEM CHA3 = 0 (0dB)
81
51
0x00
82
52
0x00
83
53
0x54
84
54
0x54
End Device 2, 3 - Address Offset 39
18
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