Microchip Technology 24LC02BT-I/LT Memory IC SC-70-5 24LC02BT-I/LT Scheda Tecnica
Codici prodotto
24LC02BT-I/LT
© 2009 Microchip Technology Inc.
DS21709J-page 7
24AA02/24LC02B
5.0
DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device. The control byte
consists of a four-bit control code. For the 24XX02, this
is set as ‘
Start condition from the master device. The control byte
consists of a four-bit control code. For the 24XX02, this
is set as ‘
1010
’
binary for read and write operations.
The next three bits of the control byte are “don’t cares”
for the 24XX02.
for the 24XX02.
The last bit of the control byte defines the operation to
be performed. When set to ‘
be performed. When set to ‘
1
’, a read operation is
selected. When set to ‘
0
’, a write operation is selected.
Following the Start condition, the 24XX02 monitors the
SDA bus, checking the device type identifier being
transmitted and, upon a
SDA bus, checking the device type identifier being
transmitted and, upon a
‘1010’
code, the slave device
outputs an Acknowledge signal on the SDA line.
Depending on the state of the R/W bit, the 24XX02 will
select a read or write operation.
Depending on the state of the R/W bit, the 24XX02 will
select a read or write operation.
FIGURE 5-1:
CONTROL BYTE
ALLOCATION
ALLOCATION
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
Operation
Control
Code
Block Select
R/W
Read
1010
Block Address
1
Write
1010
Block Address
0
1
0
1
0
x
x
x
R/W ACK
Start Bit
Read/Write Bit
x = “don’t care”
S
Slave Address
Acknowledge Bit
Control Code
Block
Select
Bits
1
0
1
0
x
x
R/W
A
7
A
0
•
•
•
•
•
•
Control Byte
Address Low Byte
Control
Code
Block
Select
bits
x = “don’t care”
x