Microchip Technology Microstick for the 5V PIC24F K-series DM240013-2 DM240013-2 Scheda Tecnica

 2013 Microchip Technology Inc.

DS30003030B-page 243

The CTMU module can also generate an output pulse
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
When the module is configured for pulse generation
delay by setting the TGEN bit (CTMUCON1L<12>), the
internal current source is connected to the B input of
Comparator 2. A Capacitor (C

DELAY

) is connected to

the Comparator 2 pin, C2INB, and the Comparator
Voltage Reference, CV

REF

, is connected to C2INA.

CV

REF

 is then configured for a specific trip point. The

module begins to charge C

DELAY

 when an edge event

is detected. While CV

REF

 is greater than the voltage on

C

DELAY

, the CTPLS pin is high. 

When the voltage on C

DELAY

 equals CV

REF

, CTPLS

goes low. With Comparator 2 configured as the second
edge, this stops the CTMU from charging. In this state
event, the CTMU automatically connects to ground.
The IDISSEN bit doesn’t need to be set and cleared
before the next CTPLS cycle. 

 illustrates the external connections for

pulse generation, as well as the relationship of the
different analog modules required. While CTED1 is
shown as the input pulse source, other options are
available. A detailed discussion on pulse generation
with the CTMU module is provided in the “PIC24F
Family Reference Manual”

.

C2

CV

REF

CTPLS

Current

Comparator

CTMU

CTED1

C2INB

C

DELAY

EDG1STAT

–

Q

Q

D

CK

EDG2STAT

Source

R

V

DD

EDG1STAT

EDG2STAT