Microchip Technology MA240017 Scheda Tecnica
PIC24F16KA102 FAMILY
DS39927C-page 150
2008-2011 Microchip Technology Inc.
REGISTER 18-1:
UxMODE: UARTx MODE REGISTER
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
(
)
R/W-0
)
UARTEN
—
USIDL
IREN
RTSMD
—
UEN1
UEN0
bit 15
bit 8
R/C-0, HC
R/W-0
R/W-0, HC
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
WAKE
LPBACK
ABAUD
RXINV
BRGH
PDSEL1
PDSEL0
STSEL
bit 7
bit 0
Legend:
C = Clearable bit
HC = Hardware Clearable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
UARTEN:
UARTx Enable bit
1
= UARTx is enabled; all UARTx pins are controlled by UARTx as defined by UEN<1:0>
0
= UARTx is disabled; all UARTx pins are controlled by port latches; UARTx power consumption is
minimal
bit 14
Unimplemented:
Read as ‘0’
bit 13
USIDL:
Stop in Idle Mode bit
1
= Discontinue module operation when device enters Idle mode
0
= Continue module operation in Idle mode
bit 12
IREN:
IrDA
®
Encoder and Decoder Enable bit
1
= IrDA encoder and decoder are enabled
0
= IrDA encoder and decoder are disabled
bit 11
RTSMD:
Mode Selection for UxRTS Pin bit
1
= UxRTS pin is in Simplex mode
0
= UxRTS pin is in Flow Control mode
bit 10
Unimplemented:
Read as ‘0’
bit 9-8
UEN<1:0>:
UARTx Enable bits
11
= UxTX, UxRX and UxBCLK pins are enabled and used; UxCTS pin is controlled by port latches
10
= UxTX, UxRX, UxCTS and UxRTS pins are enabled and used
01
= UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches
00
= UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/UxBCLK pins are controlled by port
latches
bit 7
WAKE:
Wake-up on Start Bit Detect During Sleep Mode Enable bit
1
= UARTx will continue to sample the UxRX pin; interrupt generated on falling edge, bit is cleared in
hardware on the following rising edge
0
= No wake-up is enabled
bit 6
LPBACK:
UARTx Loopback Mode Select bit
1
= Enable Loopback mode
0
= Loopback mode is disabled
bit 5
ABAUD:
Auto-Baud Enable bit
1
= Enable baud rate measurement on the next character – requires reception of a Sync field (55h);
cleared in hardware upon completion
0
= Baud rate measurement is disabled or completed
bit 4
RXINV:
Receive Polarity Inversion bit
1
= UxRX Idle state is ‘0’
0
= UxRX Idle state is ‘1’
Note 1:
This feature is only available for the 16x BRG mode (BRGH = 0).
2:
Bit availability depends on pin availability.