Microchip Technology MA330031-2 Scheda Tecnica
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 306
2011-2013 Microchip Technology Inc.
REGISTER 21-20: CxRXMnSID: ECANx ACCEPTANCE FILTER MASK n STANDARD IDENTIFIER
REGISTER (n = 0-2)
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
bit 15
bit 8
R/W-x
R/W-x
R/W-x
U-0
R/W-x
U-0
R/W-x
R/W-x
SID2
SID1
SID0
—
MIDE
—
EID17
EID16
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-5
SID<10:0>:
Standard Identifier bits
1
= Includes bit, SIDx, in filter comparison
0
= SIDx bit is a don’t care in filter comparison
bit 4
Unimplemented:
Read as ‘0’
bit 3
MIDE:
Identifier Receive Mode bit
1
= Matches only message types (standard or extended address) that correspond to EXIDE bit in the filter
0
= Matches either standard or extended address message if filters match (i.e., if (Filter SID) = (Message
SID) or if (Filter SID/EID) = (Message SID/EID))
bit 2
Unimplemented:
Read as ‘0’
bit 1-0
EID<17:16>:
Extended Identifier bits
1
= Includes bit, EIDx, in filter comparison
0
= EIDx bit is a don’t care in filter comparison
REGISTER 21-21: CxRXMnEID: ECANx ACCEPTANCE FILTER MASK n EXTENDED IDENTIFIER
REGISTER (n = 0-2)
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
bit 15
bit 8
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
EID<15:0>:
Extended Identifier bits
1
= Includes bit, EIDx, in filter comparison
0
= EIDx bit is a don’t care in filter comparison