Microchip Technology MCP1630DM-DDBS1 Scheda Tecnica
©
2007 Microchip Technology Inc.
DS41211D-page 31
PIC12F683
4.0
GPIO PORT
There are as many as six general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
4.1
GPIO and the TRISIO Registers
GPIO is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISIO.
Setting a TRISIO bit (=
corresponding data direction register is TRISIO.
Setting a TRISIO bit (=
1
) will make the corresponding
GPIO pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISIO
bit (=
driver in a High-Impedance mode). Clearing a TRISIO
bit (=
0
) will make the corresponding GPIO pin an
output (i.e., put the contents of the output latch on the
selected pin). An exception is GP3, which is input only
and its TRISIO bit will always read as ‘
selected pin). An exception is GP3, which is input only
and its TRISIO bit will always read as ‘
1
’. Example 4-1
shows how to initialize GPIO.
Reading the GPIO register reads the status of the pins,
whereas writing to it will write to the PORT latch. All
write operations are read-modify-write operations.
whereas writing to it will write to the PORT latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the
PORT data latch. GP3 reads ‘
read, this value is modified and then written to the
PORT data latch. GP3 reads ‘
0
’ when MCLRE =
1
.
The TRISIO register controls the direction of the GPIO
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISIO register
are maintained set when using them as analog inputs.
I/O pins configured as analog input always read ‘
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISIO register
are maintained set when using them as analog inputs.
I/O pins configured as analog input always read ‘
0
’.
EXAMPLE 4-1:
INITIALIZING GPIO
Note:
The ANSEL and CMCON0 registers must
be initialized to configure an analog
channel as a digital input. Pins configured
as analog inputs will read ‘
be initialized to configure an analog
channel as a digital input. Pins configured
as analog inputs will read ‘
0
’.
BANKSEL
GPIO
;
CLRF
GPIO
;Init GPIO
MOVLW
07h
;Set GP<2:0> to
MOVWF
CMCON0
;digital I/O
BANKSEL
ANSEL
;
CLRF ANSEL
;digital
I/O
MOVLW
0Ch
;Set GP<3:2> as inputs
MOVWF
TRISIO
;and set GP<5:4,1:0>
;as outputs
REGISTER 4-1:
GPIO: GENERAL PURPOSE I/O REGISTER
U-0
U-0
R/W-x
R/W-0
R-x
R/W-0
R/W-0
R/W-0
—
—
GP5
GP4
GP3
GP2
GP1
GP0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘
0
’
bit 5-0
GP<5:0>: GPIO I/O Pin bit
1
= Port pin is > V
IH
0
= Port pin is < V
IL