Microchip Technology DM183021 Scheda Tecnica
PIC18F2331/2431/4331/4431
DS39616D-page 208
2010 Microchip Technology Inc.
bit 3-0
SSPM<3:0>
: Synchronous Serial Port Mode Select bits
(3)
0000
= SPI Master mode, Clock = F
OSC
/4
0001
= SPI Master mode, Clock = F
OSC
/16
0010
= SPI Master mode, Clock = F
OSC
/64
0011
= SPI Master mode, Clock = TMR2 output/2
0100
= SPI Slave mode, Clock = SCK pin, SS pin control enabled
0101
= SPI Slave mode, Clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0110
= I
2
C Slave mode, 7-bit address
0111
= I
2
C Slave mode, 10-bit address
1011
= I
2
C Firmware Controlled Master mode (slave Idle)
1110
= I
2
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
1111
= I
2
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
REGISTER 19-2:
SSPCON: SYNCHRONOUS SERIAL PORT CONTROL REGISTER (CONTINUED)
Note 1:
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by
writing to the SSPBUF register.
writing to the SSPBUF register.
2:
When enabled, these pins must be properly configured as inputs or outputs.
3:
Bit combinations not specifically listed here are either reserved or implemented in I
2
C™ mode only.