Microchip Technology MA330011 Scheda Tecnica
dsPIC33F
DS70165E-page 186
Preliminary
©
2007 Microchip Technology Inc.
REGISTER 15-4:
SEVTCMP: SPECIAL EVENT COMPARE REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SEVTDIR
(1)
SEVTCMP<14:8>
(2)
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
(2)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
SEVTDIR: Special Event Trigger Time Base Direction bit
(1)
1
= A Special Event Trigger will occur when the PWM time base is counting downwards
0
= A Special Event Trigger will occur when the PWM time base is counting upwards
bit 14-0
SEVTCMP<14:0>: Special Event Compare Value bits
(2)
Note 1:
SEVTDIR is compared with PTDIR (PTMR<15>) to generate the Special Event Trigger.
2:
SEVTCMP<14:0> is compared with PTMR<14:0> to generate the Special Event Trigger.