Microchip Technology MA330011 Scheda Tecnica
©
2007 Microchip Technology Inc.
Preliminary
DS70165E-page 31
dsPIC33F
bit 7-5
IPL<2:0>: CPU Interrupt Priority Level Status bits
(2)
111
= CPU Interrupt Priority Level is 7 (15), user interrupts disabled
110
= CPU Interrupt Priority Level is 6 (14)
101
= CPU Interrupt Priority Level is 5 (13)
100
= CPU Interrupt Priority Level is 4 (12)
011
= CPU Interrupt Priority Level is 3 (11)
010
= CPU Interrupt Priority Level is 2 (10)
001
= CPU Interrupt Priority Level is 1 (9)
000
= CPU Interrupt Priority Level is 0 (8)
bit 4
RA: REPEAT Loop Active bit
1
= REPEAT loop in progress
0
= REPEAT loop not in progress
bit 3
N: MCU ALU Negative bit
1
= Result was negative
0
= Result was non-negative (zero or positive)
bit 2
OV: MCU ALU Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the magnitude which
causes the sign bit to change state.
causes the sign bit to change state.
1
= Overflow occurred for signed arithmetic (in this arithmetic operation)
0
= No overflow occurred
bit 1
Z: MCU ALU Zero bit
1
= An operation which affects the Z bit has set it at some time in the past
0
= The most recent operation which affects the Z bit has cleared it (i.e., a non-zero result)
bit 0
C: MCU ALU Carry/Borrow bit
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
REGISTER 2-1:
SR: CPU STATUS REGISTER (CONTINUED)
Note 1:
This bit may be read or cleared (not set).
2:
The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority
Level. The value in parentheses indicates the IPL if IPL<3> =
Level. The value in parentheses indicates the IPL if IPL<3> =
1
. User interrupts are disabled when
IPL<3> =
1
.
3:
The IPL<2:0> Status bits are read only when NSTDIS =
1
(INTCON1<15>).