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Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente

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DEMO9S12XHY256
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Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
110
Freescale Semiconductor
2.3.36
Port M Polarity Select Register (PPSM)
2.3.37
Port MWired-Or Mode Register (WOMM)
Table 2-30. WOMM Register Field Descriptions
 Address 0x0255
Access: User read/write
1
1
Read: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
0
0
0
0
PPSM3
PPSM2
PPSM1
PPSM0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-33. Port M Polarity Select Register (PPSM)
Table 2-29. PPST Register Field Descriptions
Field
Description
3-0
PPSM
Port M pull device select—Configure pull device polarity on input pin
This bit selects a pull-up or a pull-down device if enabled on the associated port input pin.
1 A pull-down device is selected
0 A pull-up device is selected
 Address 0x0256
Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
WOMM1
WOMM0
W
Reset
0
0
0
0
0
0
1
1
= Unimplemented or Reserved
Figure 2-34. Port MWired-Or Mode Register
Field
Description
1-0
WOMM
Port M wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or. If enabled the output is driven active low only (open-drain). A
logic level of “1” is not driven.This allows a multipoint connection of several serial modules. These bits have no
influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.