Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente

Freescale Semiconductor

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The S12XDBG module provides an on-chip trace buffer with flexible triggering capability to allow non-
intrusive debug of application software. The S12XDBG module is optimized for the S12X 16-bit
architecture and allows debugging of CPU12X module operations.

Typically the S12XDBG module is used in conjunction with the S12XBDM module, whereby the user
configures the S12XDBG module for a debugging session over the BDM interface. Once configured the
S12XDBG module is armed and the device leaves BDM Mode returning control to the user program,
which is then monitored by the S12XDBG module. Alternatively the S12XDBG module can be configured
over a serial interface using SWI routines.

V03.20

14 Sep 2007

- Clarified reserved State Sequencer encodings.

V03.21

23 Oct 2007

- Added single databyte comparison limitation information
- Added statement about interrupt vector fetches whilst tagging.

V03.22

12 Nov 2007

- Removed LOOP1 tracing restriction NOTE.
- Added pin reset effect NOTE.

V03.23

13 Nov 2007

General

- Text readability improved, typo removed.

V03.24

04 Jan 2008

- Corrected bit name.

V03.25

14 May 2008

General

- Updated Revision History Table format. Corrected other paragraph formats.

V03.26

12 Sep 2012

General

- Added missing full stops. Removed redundant quotation marks.

COF

Change Of Flow.
Change in the program flow due to a conditional branch, indexed jump or interrupt

BDM

Background Debug Mode

DUG

Device User Guide, describing the features of the device into which the DBG is integrated

WORD

16-bit data entity