Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente

Codici prodotto

DEMO9S12XHY256

Freescale’s Scalable Controller Area Network (S12MSCANV3)

MC9S12XHY-Family Reference Manual, Rev. 1.04

372

Freescale Semiconductor

11.3.3.3

Data Length Register (DLR)

This register keeps the data length field of the CAN frame.

11.3.3.4

Transmit Buffer Priority Register (TBPR)

This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:

•

All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.

Module Base + 0x00XC

DLC3

DLC2

DLC1

DLC0

Reset:

= Unused; always read “x”

Figure 11-35. Data Length Register (DLR) — Extended Identifier Mapping

Table 11-34. DLR Register Field Descriptions

Field

Description

3-0

DLC[3:0]

Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.

Table 11-35

shows the effect of setting the DLC bits.

Table 11-35. Data Length Codes

Data Length Code

Data Byte

Count

DLC3

DLC2

DLC1

DLC0