Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente
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DEMO9S12XHY256
Timer Module (TIM16B8CV2) Block Description
MC9S12XHY-Family Reference Manual, Rev. 1.04
524
Freescale Semiconductor
16.3.2.1
Timer Input Capture/Output Compare Select (TIOS)
Read: Anytime
Write: Anytime
16.3.2.2
Timer Compare Force Register (CFORC)
0x002C
OCPD
R
OCPD7
OCPD6
OCPD5
OCPD4
OCPD3
OCPD2
OCPD1
OCPD0
W
0x002D
R
0x002E
PTPSR
R
PTPS7
PTPS6
PTPS5
PTPS4
PTPS3
PTPS2
PTPS1
PTPS0
W
0x002F
Reserved
R
W
Module Base + 0x0000
7
6
5
4
3
2
1
0
R
IOS7
IOS6
IOS5
IOS4
IOS3
IOS2
IOS1
IOS0
W
Reset
0
0
0
0
0
0
0
0
Figure 16-6. Timer Input Capture/Output Compare Select (TIOS)
Table 16-2. TIOS Field Descriptions
Field
Description
7:0
IOS[7:0]
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Module Base + 0x0001
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
FOC7
FOC6
FOC5
FOC4
FOC3
FOC2
FOC1
FOC0
Reset
0
0
0
0
0
0
0
0
Figure 16-7. Timer Compare Force Register (CFORC)
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented or Reserved
Figure 16-5. TIM16B8CV2 Register Summary (Sheet 3 of 3)