Analog Devices AD7265 Evaluation Board EVAL-AD7265EDZ EVAL-AD7265EDZ Scheda Tecnica
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EVAL-AD7265EDZ
EVAL-AD7265/AD7266
Rev. 0 | Page 3 of 24
EVALUATION BOARD HARDWARE
POWER SUPPLIES
When using this evaluation board with the EVAL-CED1Z, all
supplies are provided from the EVAL-CED1Z through the
96-way connector. When using the board as a standalone unit,
external supplies must be provided. This evaluation board has
the following power supply inputs: +12 V, −12 V, A
supplies are provided from the EVAL-CED1Z through the
96-way connector. When using the board as a standalone unit,
external supplies must be provided. This evaluation board has
the following power supply inputs: +12 V, −12 V, A
VDD
(+5 V),
D
VDD
(+5 V), AGND, V
DRIVE
, and DGND. The +12 V supply is
only required if the external AD780 voltage reference and op
amps are to be used.
The supplies are decoupled to the relevant ground plane with
10 µF tantalum and 0.1 µF multilayer ceramic capacitors at the
point where they enter the board. The supply pins for the exter-
amps are to be used.
The supplies are decoupled to the relevant ground plane with
10 µF tantalum and 0.1 µF multilayer ceramic capacitors at the
point where they enter the board. The supply pins for the exter-
nal reference are also decoupled to AGND with a 470 nF ceramic
capacitor. The AD7265/AD7266 AV
capacitor. The AD7265/AD7266 AV
DD
and V
DRIVE
supply pins
are also decoupled to AGND, while DV
DD
is decoupled to DGND,
with a 0.1 µF multilayer ceramic capacitor and a 10 µF tantalum
capacitor at the device pins. Extensive ground planes are used
on this board to minimize the effect of high frequency noise
interference. There are two ground planes, AGND and DGND.
These are connected at one location close to the AD7265/AD7266.
capacitor at the device pins. Extensive ground planes are used
on this board to minimize the effect of high frequency noise
interference. There are two ground planes, AGND and DGND.
These are connected at one location close to the AD7265/AD7266.
LINK OPTIONS
There are 49 link options that must be set correctly to select the
appropriate operating setup before using the evaluation board.
The functions of the link options are outlined in Table 1.
appropriate operating setup before using the evaluation board.
The functions of the link options are outlined in Table 1.
Table 1. Link Function Descriptions
Link No.
Description
LK1
This link option selects the source of the V
A1
analog input.
In Position A, V
A1
is supplied from the output of the unity gain buffer, U3-A, in which case a signal must be applied to the SVIN1
SMB socket via J13.
In Position B, V
A1
is supplied from the positive output (V1+) of the single-ended-to-differential converter, U5-B, in which case a
single-ended signal must be applied to V1 DIFF via Socket J17.
In Position C, V
A1
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK2
This link option selects the source of the V
A2
analog input.
In Position A, V
A2
is supplied from the output of the unity gain buffer, U3-B, in which case a signal must be applied to the SVIN2
socket via J14.
In Position B, V
A2
is supplied from the negative output (V1−) of the single-ended-to-differential converter, U5-A, in which case a
single-ended signal must be applied to V1 DIFF via Socket J17.
In Position C, V
In Position C, V
A2
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK3
This link option selects the source of the V
A3
analog input.
In Position A, V
A3
is supplied from the output of the unity gain buffer, U3-A, in which case a signal must be applied to the SVIN1
socket via J13.
In Position B, V
A3
is supplied from the positive output (V2+) of the single-ended-to-differential converter, U6-B, in which case a
single-ended signal must be applied to V2 DIFF via Socket J19.
In Position C, V
In Position C, V
A3
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK4
This link option selects the source of the V
A4
analog input.
In Position A, V
A4
is supplied from the output of the unity gain buffer, U3-B, in which case a signal must be applied to the SVIN2
socket via J14.
In Position B, V
A4
is supplied from the negative output (V2−) of the single-ended-to-differential converter, U6-A, in which case a
single-ended signal must be applied to V2 DIFF via Socket J19.
In Position C, V
A4
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK5
This link option selects the source of the V
A5
analog input.
In Position A, V
A5
is supplied from the output of the unity gain buffer, U3-A, in which case a signal must be applied to the SVIN1
socket via J13.
In Position B, V
A5
is supplied from the positive output (V1+) of the single-ended-to-differential converter, U5-B, in which case a
single-ended signal must be applied to V1 DIFF via Socket J17.
In Position C, V
In Position C, V
A5
is tied to AGND. If this channel is not in use, this link should be in Position C.
LK6
This link option selects the source of the V
A6
analog input.
In Position A, V
A6
is supplied from the output of the unity gain buffer, U3-B, in which case a signal must be applied to the SVIN2
socket via J14.
In Position B, V
A6
is supplied from the negative output (V1−) of the single-ended-to-differential converter, U5-A, in which case a
single-ended signal must be applied to V1 DIFF via Socket J17.
In Position C, V
In Position C, V
A6
is tied to AGND. If this channel is not in use, this link should be in Position C.