Analog Devices AD7265 Evaluation Board EVAL-AD7265EDZ EVAL-AD7265EDZ Scheda Tecnica
Codici prodotto
EVAL-AD7265EDZ
EVAL-AD7265/AD7266
Rev. 0 | Page 8 of 24
SETUP CONDITIONS
Take care to ensure that all link positions are set according to
the required operating mode before applying power and signals
to the evaluation board. There are a few different modes in
which to operate the evaluation board. Either the user can
operate the board with the EVAL-CED1Z or it can be used as a
standalone board. The board can accept differential and single-
ended analog input voltages.
the required operating mode before applying power and signals
to the evaluation board. There are a few different modes in
which to operate the evaluation board. Either the user can
operate the board with the EVAL-CED1Z or it can be used as a
standalone board. The board can accept differential and single-
ended analog input voltages.
Table 2 shows the position in which all the links are set when
the evaluation board is packaged. When the board is shipped,
the assumption is that the user is operating with the EVAL-CED1Z.
The links are set so that all power supplies and control signals
are supplied by the EVAL-CED1Z. The board is configured for
single-ended mode of operation on V
the evaluation board is packaged. When the board is shipped,
the assumption is that the user is operating with the EVAL-CED1Z.
The links are set so that all power supplies and control signals
are supplied by the EVAL-CED1Z. The board is configured for
single-ended mode of operation on V
A1
and V
B1
with a 0 V to
V
REF
input range. The AD780 provides an external reference
voltage. If the differential mode of operation is required, the link
positions must be configured as outlined in Table 4, Table 5, and
Table 6.
positions must be configured as outlined in Table 4, Table 5, and
Table 6.
Table 2. Link Positions on the Packaged EVAL-AD7265/AD7266 (Single-Ended Mode of Operation, Channel V
A1
and V
B1
Selected)
Link No.
Position
Function
LK1
A
V
A1
input is supplied from the output of the unity gain buffer U3-A. In this case, a unipolar signal must be
applied to the SVIN1 socket via J13.
LK2
C
V
A2
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
A2
is to be converted. In this case, a unipolar signal should be applied to the SVIN2 SMB (J14).
LK3
C
V
A3
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
A3
is to be converted. In this case, a unipolar signal should be applied to the SVIN1 SMB (J13).
LK4
C
V
A4
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
A4
is to be converted. In this case, a unipolar signal should be applied to the SVIN2 SMB (J14).
LK5
C
V
A5
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
A5
is to be converted. In this case, a unipolar signal should be applied to the SVIN1 SMB (J13).
LK6
C
V
A6
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
A6
is to be converted. In this case, a unipolar signal should be applied to the SVIN2 SMB (J14).
LK7
A
V
B1
is supplied from the output of the unity gain buffer U4-A. In this case, a unipolar signal must be applied to
the SVIN1 socket via J15.
LK8
C
V
B2
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
B2
is to be converted. In this case, a unipolar signal should be applied to the SVIN4 SMB (J16).
LK9
C
V
B3
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
B3
is to be converted. In this case, a unipolar signal should be applied to the SVIN3 SMB (J15).
LK10
C
V
B4
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
B4
is to be converted. In this case, a unipolar signal should be applied to the SVIN4 SMB (J16).
LK11
C
V
B5
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
B5
is to be converted. In this case, a unipolar signal should be applied to the SVIN3 SMB (J15).
LK12
C
V
B6
input is tied to AGND. Once power supplies are applied to the ADC, this link can be changed to Position A if
V
B6
is to be converted. In this case, a unipolar signal should be applied to the SVIN4 SMB (J16).
LK13
B
The AD780 voltage reference provides a 2.5 V reference to the D
CAP
A pin.
LK14
B
The AD780 voltage reference provides a 2.5 V reference to the D
CAP
B pin.
LK15
A
The V
DD
supply (5 V) for the AD7265/AD7266 is provided by the EVAL-CED1Z.
LK16
Open
The AD780 reference voltage is set to output +2.5 V.
LK17
A
The V
DRIVE
3.3 V supply for the AD7265/AD7266 is provided by the EVAL-CED1Z.
LK19
A
REF SELECT is tied to V
DRIVE
(Logic 1). The AD780 provides an external reference (2.5 V) to the AD7265/AD7266.
LK20
B
RANGE is tied to DGND (Logic 0). The analog input range is 0 V to V
REF
.
LK21
A
SGL/DIFF is tied to V
DRIVE
, enabling single-ended mode. If differential mode is required, then this link option
should be in Position B.
LK22
B
A0 is controlled by channel selection in the evaluation software.
LK23
B
A1 is controlled by channel selection in the evaluation software.
LK24
C
A2 is held low. This input must be changed manually by the user.
LK25
A
CS is provided by the EVAL-CED1Z.
LK27
B
SCLK is provided by the EVAL-CED1Z.
LK28
A
Data from D
OUT
A is read by the EVAL-CED1Z.
LK29
A
Data from D
OUT
B is read by the EVAL-CED1Z.
LK31
Closed
The input to U5-B is tied to AGND because it is not used in single-ended mode.
LK32, LK34
Closed
The inputs to U5-A are tied to AGND because they are not used in single-ended mode.