Analog Devices AD2S1210 Evaluation Board EVAL-AD2S1210EDZ EVAL-AD2S1210EDZ Scheda Tecnica

 

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When using the EVAL-AD2S1210 with the EVAL-CED1Z, all 
supplies are provided from the controller board through the  
96-way connector. 

When using the EVAL-AD2S1210 board as a standalone unit, 
external supplies must be provided. This evaluation board has 
the following six power supply inputs: 

•  AV

DD

 

•  DV

DD

 

•  V

DRIVE

 

•  +12 V 
•  AGND 
•  DGND 

If the evaluation board is used in standalone mode, 5 V must be 
connected to the AV

DD

 input to supply the 

 AV

DD

 pin. In 

addition, 5 V must be connected to the DV

DD

 input to supply 

the AD2S1210 DV

DD

 pin, the PI74ALVTC16245AE, and the 

74HC573. To supply the 

 quad op amp, 12 V should be 

used. Lastly, 0 V is connected to one or both of the AGND 
inputs and to the DGND input.  

The AV

DD

, DV

DD

 and V

DRIVE

 supplies are decoupled to the 

relevant ground plane with 4.7 μF tantalum and 0.01 μF multi-
layer ceramic capacitors. The 

, the PI74ALVTC16245AE, 

and the 74HC573 are decoupled to the relevant ground plane 
with 10 μF tantalum and 0.1 μF multilayer ceramic capacitors. 

Extensive ground planes are used on this board to minimize  
the effect of high frequency noise interference. There are two 
ground planes, AGND and DGND. These are connected at one 
location close to the AD2S1210. 

There are 16 link options that must be positioned for the required 
operating setup before using the evaluation board. The functions 
of these options are outlined in Table 1.  

LK1 

This link selects the source of the SAMPLE input signal for the AD2S1210. 

 

In Position A, the SAMPLE signal is received from the externally applied SAMPLE signal via the J8 SMB socket or the J20 
connector. 

 

In Position B, the SAMPLE signal is received from the evaluation board controller via the 96-way connector. 

 

In Position C, the SAMPLE signal is received from the S2 push-button switch. 

LK2 

This link selects the source of the CS input signal for the AD2S1210.  

In Position A, the CS signal is received from the externally applied CS signal via the J9 SMB socket.  

In Position B, the CS signal is received from the evaluation board controller via the 96-way connector. 

In Position C, the CS signal is received from the S3 push button switch. 

LK3 

This link selects the source of the RD input signal for the AD2S1210. 

In Position A, the RD signal is received from the externally applied RD signal via the J10 SMB socket. 

In Position B, the RD signal is received from the evaluation board controller via the 96-way connector. 

In Position C, the RD signal is received from the S3 push-button switch. 

LK4 

This link selects the source of the WR/FSYNC input signal for the AD2S1210.  

In Position A, the WR/FSYNC signal is received from the externally applied WR/FSYNC signal via the J11 SMB socket or the J20 
connector. 
In Position B, the  WR/FSYNC signal is received from the evaluation board controller via the 96-way connector. 

LK5 

This link selects the source of the SOE input signal for the AD2S1210. 

 

In Position A, the SOE signal is tied to V

DRIVE

 (parallel mode). 

 

In Position B, the SOE signal is tied to DGND (serial mode). 

LK6 

This link selects the source of the A0 input signal for the AD2S1210. 
In Position A, the A0 signal is received from the externally applied A0 signal via the J15 SMB socket or the J20 connector. 
In Position B, the A0 signal is received from the evaluation board controller via the 96-way connector. 

 

In Position C, the A0 signal is tied to V

DRIVE

.  

 

In Position D, the A0 signal is tied to DGND.  

LK7 

This link selects the source of the A1 input signal for the AD2S1210. 

 

In Position A, the A1 signal is received from the externally applied A0 signal via the J16 SMB socket or the J20 connector. 

 

In Position B, the A1 signal is received from the evaluation board controller via the 96-way connector. 

 

In Position C, the A1 signal is tied to V

DRIVE

. 

 

In Position D, the A1 signal is tied to DGND.