Atmel XMEGA-A1 Xplained Evaluation Board ATAVRXPLAIN ATAVRXPLAIN Scheda Tecnica
Codici prodotto
ATAVRXPLAIN
4
AVR1010
8267B-AVR-12/10
Minimize power consumption by using the deepest allowable sleep modes at any
time, and running as fast as possible to minimize time spent in ACTIVE mode.
time, and running as fast as possible to minimize time spent in ACTIVE mode.
2.4 Clock Prescaling
Although it is recommended to run the CPU as fast as possible to minimize the time
spent in ACTIVE mode, there are situations where it is better to reduce the clock rate.
These situations commonly involve waiting in ACTIVE or IDLE mode for something
that takes a fixed amount of time, e.g. serial communication. In these cases, one
should avoid generating higher CPU and peripheral clock frequencies than are
needed for the active peripherals. This may be achieved by using clock prescaling,
which can be changed without causing glitches in the clock signal.
spent in ACTIVE mode, there are situations where it is better to reduce the clock rate.
These situations commonly involve waiting in ACTIVE or IDLE mode for something
that takes a fixed amount of time, e.g. serial communication. In these cases, one
should avoid generating higher CPU and peripheral clock frequencies than are
needed for the active peripherals. This may be achieved by using clock prescaling,
which can be changed without causing glitches in the clock signal.
If prescaling is done internally in several peripherals, power can be conserved by
prescaling with the largest common factor as early as possible in the clock distribution
chain. This principle is illustrated in Figure 2-1.
prescaling with the largest common factor as early as possible in the clock distribution
chain. This principle is illustrated in Figure 2-1.
Figure 2-1: Peripherals without and with common prescaling by largest factor.
Peripheral w/
prescaling by
prescaling by
256
Peripheral w/
prescaling by
prescaling by
8
Peripheral w/
prescaling by
prescaling by
64
Prescaling by
8
Peripheral w/
no prescaling
Peripheral w/
prescaling by
prescaling by
8
Peripheral w/
prescaling by
prescaling by
32
System
clock
Peripheral
clock
No
prescaling
Peripheral
clock
System
clock
Note that since the prescaling also affects the CPU clock, it might not always be
desirable to perform this common prescaling in ACTIVE mode because computations
will take longer.
desirable to perform this common prescaling in ACTIVE mode because computations
will take longer.
Minimize power consumption by actively using prescaling, especially when waiting in
ACTIVE or IDLE mode.
ACTIVE or IDLE mode.
2.5 Clock Source Switching
One should avoid generating higher system clock rates than are actually needed. In
the ideal case, prescaling is unnecessary. This can be achieved by switching
between clock sources.
the ideal case, prescaling is unnecessary. This can be achieved by switching
between clock sources.
As an example, it is preferable to generate a 16MHz system clock by use of the PLL
with the 2MHz RC oscillator as reference, rather than the 32MHz RC oscillator with
prescaling to 16MHz. External clock sources may also be a good choice, especially if
they are already available in the system and therefore come with no extra “cost”.
with the 2MHz RC oscillator as reference, rather than the 32MHz RC oscillator with
prescaling to 16MHz. External clock sources may also be a good choice, especially if
they are already available in the system and therefore come with no extra “cost”.
The wake-up delay for the device depends on which clock source is used for the
system clock. One way to reduce this delay is to switch between clock sources so
that the device goes to sleep and wakes up with a fast-responding clock source.
system clock. One way to reduce this delay is to switch between clock sources so
that the device goes to sleep and wakes up with a fast-responding clock source.