Atmel XMEGA-A1 Xplained Evaluation Board ATAVRXPLAIN ATAVRXPLAIN Scheda Tecnica
Codici prodotto
ATAVRXPLAIN
4
AVR1907
8203D-AVR-04/10
Table 4-1. XMEGA programming and debugging interface – JTAG and PDI.
J100 pin
JTAG
(1)
PDI
(2)
J100-1 TCK
-
J100-2
GND GND
(3)
J100-3
TDO -
J100-4
VCC VCC
(3)
J100-5
TMS -
J100-6
nSRST CLK
J100-7
VCC VCC
(3)
J100-8
- DATA
J100-9
TDI -
J100-10
GND GND
(3)
Notes:
1. Standard pin-out for JTAGICE mkII and other Atmel programming tools.
2. Requires adapter to connect a JTAGICE mkII (refer to AVR Studio help).
3. It is only required to connect on VCC/GND pin.
The AT90USB1287 can be programmed through its bootloader. The bootloader is
evoked by shorting the (PORTF4) pin to GND before applying power to the board.
This can be done by shorting pin 1 and 2 on the “JTAG USB” pin header (J200) with a
jumper. Programming is performed through the “FLIP” plug-in in AVR Studio (can be
started as a stand-alone application also).
evoked by shorting the (PORTF4) pin to GND before applying power to the board.
This can be done by shorting pin 1 and 2 on the “JTAG USB” pin header (J200) with a
jumper. Programming is performed through the “FLIP” plug-in in AVR Studio (can be
started as a stand-alone application also).
FLIP (FLexible In-system Programmer) is a free Atmel’s proprietary software that runs
Windows
Windows
®
9x/Me/NT/2000/XP and Linux x86. FLIP supports in-system programming
of Flash devices through RS232, USB or CAN.
Alternatively, the AT90USB1287 can be also programmed by connecting a
programming tool, such as a JTAGICE mkII, to the “JTAG USB” pin header (J200).
programming tool, such as a JTAGICE mkII, to the “JTAG USB” pin header (J200).
Note that it is not recommended to program the AT90USB1287 using a
programming tool as this will erase the bootloader.
programming tool as this will erase the bootloader.
4.2 IO expansion headers
The XMEGA’s analog PORTA is available on the “XMEGA PORT A” pin header
(J101). This allows the user to connect external signals to the ADC, DAC and Analog
Comparators on PORTA.
(J101). This allows the user to connect external signals to the ADC, DAC and Analog
Comparators on PORTA.
The XMEGA’s digital PORTD is available on the “XMEGA PORT D” pin header
(J102). This port features general purpose IO and various communication modules
(USART, SPI and TWI).
(J102). This port features general purpose IO and various communication modules
(USART, SPI and TWI).
Note that the communication modules on PORTD can be interconnected to test out
various functions and features: The USART can loop back communication with a
jumper, or communicate between the two UARTs on the PORT. The native SPI and
the USART in SPI master mode can be connected, and the TWI module can be
enabled in both master and slave mode at the same time to get loop back behavior
(pull-up resistors required).
various functions and features: The USART can loop back communication with a
jumper, or communicate between the two UARTs on the PORT. The native SPI and
the USART in SPI master mode can be connected, and the TWI module can be
enabled in both master and slave mode at the same time to get loop back behavior
(pull-up resistors required).