Atmel Xplained Evaluation Board AT32UC3L0-XPLD AT32UC3L0-XPLD Scheda Tecnica
Codici prodotto
AT32UC3L0-XPLD
42
32099G–06/2011
AT32UC3L016/32/64
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers
manufactured in the same process technology. These values are not covered by test limits in
production.
production.
7.4
Maximum Clock Frequencies
These parameters are given in the following conditions:
• V
VDDCORE
= 1.62V to 1.98V
• Temperature = -40°C to 85°C
7.5
Power Consumption
The values in
are measured values of power consumption under the following condi-
tions, except where noted:
• Operating conditions internal core supply (
) - this is the default configuration
– V
VDDIN
= 3.0V
– V
VDDCORE
= 1.62V, supplied by the internal regulator
Table 7-3.
Supply Rise Rates and Order
Symbol
Parameter
Rise Rate
Min
Max
Unit
Comment
V
VDDIO
DC supply peripheral I/Os
0
2.5
V/µs
V
VDDIN
DC supply peripheral I/Os
and internal regulator
and internal regulator
0.002
2.5
V/µs
Slower rise time requires
external power-on reset
circuit.
external power-on reset
circuit.
V
VDDCORE
DC supply core
0
2.5
V/µs
Rise before or at the same
time as VDDIO
time as VDDIO
V
VDDANA
Analog supply voltage
0
2.5
V/µs
Rise together with
VDDCORE
VDDCORE
Table 7-4.
Clock Frequencies
Symbol
Parameter
Conditions
Min
Max
Units
f
CPU
CPU clock frequency
50
MHz
f
PBA
PBA clock frequency
50
MHz
f
PBB
PBB clock frequency
50
MHz
f
GCLK0
GCLK0 clock frequency
DFLLIF main reference, GCLK0
pin
pin
150
MHz
f
GCLK1
GCLK1 clock frequency
DFLLIF dithering and ssg
reference, GCLK1 pin
reference, GCLK1 pin
150
MHz
f
GCLK2
GCLK2 clock frequency
AST, GCLK2 pin
80
MHz
f
GCLK3
GCLK3 clock frequency
PWMA, GCLK3 pin
110
MHz
f
GCLK4
GCLK4 clock frequency
CAT, ACIFB, GCLK4 pin
110
MHz
f
GCLK5
GCLK5 clock frequency
GLOC
80
MHz