Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Scheda Tecnica

230

SAM9G25 [DATASHEET]

11032C–ATARM–25-Jan-13

Notes: 1. Reset value depends on the product implementation.

2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.

3. Reset value of PIO_PDSR depends on the level of the I/O lines. Reading the I/O line levels requires the clock of the 

PIO Controller to be enabled, otherwise PIO_PDSR reads the levels present on the I/O line at the time the clock was 
disabled.

4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have 

occurred.

Note:

If an offset is not listed in the table it must be considered as reserved.

0x0118

I/O Drive Register 2

PIO_DRIVER2

Read-write

0x00000000

0x011C

Reserved

0x0120
to
0x014C

Reserved