Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Scheda Tecnica
Codici prodotto
AT91SAM9G25-EK
366
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
29.3
I/O Lines Description
29.4
Multiplexed Signals
Table 29-1. I/O Line Description
Name
Description
Type
Active Level
NCS[7:0]
Static Memory Controller Chip Select Lines
Output
Low
NRD
Read Signal
Output
Low
NWR0/NWE
Write 0/Write Enable Signal
Output
Low
A0/NBS0
Address Bit 0/Byte 0 Select Signal
Output
Low
NWR1/NBS1
Write 1/Byte 1 Select Signal
Output
Low
A1/NWR2/NBS2
Address Bit 1/Write 2/Byte 2 Select Signal
Output
Low
NWR3/NBS3
Write 3/Byte 3 Select Signal
Output
Low
A[25:2]
Address Bus
Output
D[31:0] Data
Bus
I/O
NWAIT
External Wait Signal
Input
Low
Table 29-2. Static Memory Controller (SMC) Multiplexed Signals
Multiplexed Signals
Related Function
NWR0
NWE
Byte-write or byte-select access, see
A0
NBS0
8-bit or 16-/32-bit data bus, see
NWR1
NBS1
Byte-write or byte-select access see
A1
NWR2
NBS2
.
Byte-write or byte-select access, see
NWR3
NBS3
Byte-write or byte-select access see