Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Scheda Tecnica
Codici prodotto
AT91SAM9G25-EK
403
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
Figure 29-14.WRITE_MODE = 1. The write operation is controlled by NWE
29.9.4.2 Write is Controlled by NCS (WRITE_MODE = 0)
shows the waveforms of a write operation with WRITE_MODE set to 0. The data is put on the bus during
the pulse and hold steps of the NCS signal. The internal data buffers are switched to output mode after the
NCS_WR_SETUP time, and until the end of the write cycle, regardless of the programmed waveform on NWE.
NCS_WR_SETUP time, and until the end of the write cycle, regardless of the programmed waveform on NWE.
Figure 29-15.WRITE_MODE = 0. The write operation is controlled by NCS
MCK
D[31:0]
NCS
A
[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
NBS2, NBS3,
A0, A1
NWE,
NWR0, NWR1,
NWR2, NWR3
NWR2, NWR3
MCK
D[31:0]
NCS
NWE,
NWR0, NWR1,
NWR2, NWR3
NWR2, NWR3
A
[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
NBS2, NBS3,
A0, A1