Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD Scheda Tecnica

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

If this bit is set to 1, an unaligned access generates a usage fault.

Unaligned LDM, STM, LDRD, and STRD instructions always fault irrespective of whether UNALIGN_TRP is set to 1.

Enables unprivileged software access to the NVIC_STIR register, see 

:

0: Disable.

1: Enable.

Indicates how the processor enters Thread mode:

0: The processor can enter the Thread mode only when no exception is active.

1: The processor can enter the Thread mode from any level under the control of an EXC_RETURN value, see 

.